drivers/gpu/drm/i915/display/i9xx_plane.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/i915/display/i9xx_plane.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/i915/display/i9xx_plane.c- Extension
.c- Size
- 37314 bytes
- Lines
- 1272
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/kernel.hdrm/drm_atomic_helper.hdrm/drm_blend.hdrm/drm_fourcc.hdrm/drm_print.hi9xx_plane.hi9xx_plane_regs.hintel_atomic.hintel_de.hintel_display_irq.hintel_display_regs.hintel_display_types.hintel_display_utils.hintel_fb.hintel_fbc.hintel_frontbuffer.hintel_plane.hintel_sprite.h
Detected Declarations
function i8xx_plane_format_mod_supportedfunction i965_plane_format_mod_supportedfunction i9xx_plane_has_fbcfunction i9xx_plane_has_windowingfunction i9xx_plane_ctlfunction i9xx_check_plane_surfacefunction i9xx_plane_checkfunction i8xx_plane_surf_offsetfunction i965_plane_surf_offsetfunction i9xx_plane_ctl_crtcfunction i9xx_plane_ratiofunction i9xx_plane_min_cdclkfunction i9xx_plane_update_noarmfunction i9xx_plane_update_armfunction i830_plane_update_armfunction i9xx_plane_disable_armfunction g4x_primary_capture_errorfunction i965_plane_capture_errorfunction i8xx_plane_capture_errorfunction g4x_primary_async_flipfunction vlv_primary_async_flipfunction bdw_primary_enable_flip_donefunction bdw_primary_disable_flip_donefunction ivb_primary_enable_flip_donefunction ivb_primary_disable_flip_donefunction ilk_primary_enable_flip_donefunction ilk_primary_disable_flip_donefunction vlv_primary_enable_flip_donefunction vlv_primary_disable_flip_donefunction i9xx_plane_can_async_flipfunction i9xx_plane_get_hw_statefunction hsw_primary_max_stridefunction ilk_primary_max_stridefunction i965_plane_max_stridefunction i915_plane_max_stridefunction i8xx_plane_max_stridefunction vlv_plane_min_alignmentfunction g4x_primary_min_alignmentfunction i965_plane_min_alignmentfunction i9xx_plane_min_alignmentfunction i9xx_disable_tilingfunction intel_primary_plane_createfunction i9xx_format_to_fourccfunction i9xx_get_initial_plane_configfunction i9xx_fixup_initial_plane_config
Annotated Snippet
while ((src_x + src_w) * cpp > plane_state->view.color_plane[0].mapping_stride) {
if (offset == 0) {
drm_dbg_kms(display->drm,
"[PLANE:%d:%s] unable to find suitable display surface offset due to X-tiling\n",
plane->base.base.id, plane->base.name);
return -EINVAL;
}
offset = intel_plane_adjust_aligned_offset(&src_x, &src_y, plane_state, 0,
offset, offset - alignment);
}
}
/*
* Put the final coordinates back so that the src
* coordinate checks will see the right values.
*/
drm_rect_translate_to(&plane_state->uapi.src,
src_x << 16, src_y << 16);
/* HSW/BDW do this automagically in hardware */
if (!display->platform.haswell && !display->platform.broadwell) {
unsigned int rotation = plane_state->hw.rotation;
int src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
int src_h = drm_rect_height(&plane_state->uapi.src) >> 16;
if (rotation & DRM_MODE_ROTATE_180) {
src_x += src_w - 1;
src_y += src_h - 1;
} else if (rotation & DRM_MODE_REFLECT_X) {
src_x += src_w - 1;
}
}
if (display->platform.haswell || display->platform.broadwell) {
drm_WARN_ON(display->drm, src_x > 8191 || src_y > 4095);
} else if (DISPLAY_VER(display) >= 4 &&
fb->modifier == I915_FORMAT_MOD_X_TILED) {
drm_WARN_ON(display->drm, src_x > 4095 || src_y > 4095);
}
plane_state->view.color_plane[0].offset = offset;
plane_state->view.color_plane[0].x = src_x;
plane_state->view.color_plane[0].y = src_y;
return 0;
}
static int
i9xx_plane_check(struct intel_crtc_state *crtc_state,
struct intel_plane_state *plane_state)
{
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
int ret;
ret = chv_plane_check_rotation(plane_state);
if (ret)
return ret;
ret = intel_plane_check_clipping(plane_state, crtc_state,
DRM_PLANE_NO_SCALING,
DRM_PLANE_NO_SCALING,
i9xx_plane_has_windowing(plane));
if (ret)
return ret;
ret = i9xx_check_plane_surface(plane_state);
if (ret)
return ret;
if (!plane_state->uapi.visible)
return 0;
ret = intel_plane_check_src_coordinates(plane_state);
if (ret)
return ret;
plane_state->ctl = i9xx_plane_ctl(plane_state);
return 0;
}
static u32 i8xx_plane_surf_offset(const struct intel_plane_state *plane_state)
{
int x = plane_state->view.color_plane[0].x;
int y = plane_state->view.color_plane[0].y;
return intel_fb_xy_to_linear(x, y, plane_state, 0);
}
Annotation
- Immediate include surface: `linux/kernel.h`, `drm/drm_atomic_helper.h`, `drm/drm_blend.h`, `drm/drm_fourcc.h`, `drm/drm_print.h`, `i9xx_plane.h`, `i9xx_plane_regs.h`, `intel_atomic.h`.
- Detected declarations: `function i8xx_plane_format_mod_supported`, `function i965_plane_format_mod_supported`, `function i9xx_plane_has_fbc`, `function i9xx_plane_has_windowing`, `function i9xx_plane_ctl`, `function i9xx_check_plane_surface`, `function i9xx_plane_check`, `function i8xx_plane_surf_offset`, `function i965_plane_surf_offset`, `function i9xx_plane_ctl_crtc`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.