drivers/gpu/drm/i915/display/intel_atomic.h

File Facts

System

Linux kernel

Corpus path

drivers/gpu/drm/i915/display/intel_atomic.h

Extension

.h

Size

1913 bytes

Lines

55

Domain

Driver Families

Bucket

drivers/gpu

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• linux/types.h

Detected Declarations

• struct drm_atomic_commit
• struct drm_connector
• struct drm_connector_state
• struct drm_crtc
• struct drm_crtc_state
• struct drm_device
• struct drm_property
• struct intel_atomic_state
• struct intel_connector
• struct intel_crtc
• struct intel_crtc_state

Annotated Snippet

#ifndef __INTEL_ATOMIC_H__
#define __INTEL_ATOMIC_H__

#include <linux/types.h>

struct drm_atomic_commit;
struct drm_connector;
struct drm_connector_state;
struct drm_crtc;
struct drm_crtc_state;
struct drm_device;
struct drm_property;
struct intel_atomic_state;
struct intel_connector;
struct intel_crtc;
struct intel_crtc_state;

int intel_digital_connector_atomic_get_property(struct drm_connector *connector,
						const struct drm_connector_state *state,
						struct drm_property *property,
						u64 *val);
int intel_digital_connector_atomic_set_property(struct drm_connector *connector,
						struct drm_connector_state *state,
						struct drm_property *property,
						u64 val);
int intel_digital_connector_atomic_check(struct drm_connector *conn,
					 struct drm_atomic_commit *state);
struct drm_connector_state *
intel_digital_connector_duplicate_state(struct drm_connector *connector);
bool intel_connector_needs_modeset(struct intel_atomic_state *state,
				   struct drm_connector *connector);
bool intel_any_crtc_needs_modeset(struct intel_atomic_state *state);
struct intel_digital_connector_state *
intel_atomic_get_digital_connector_state(struct intel_atomic_state *state,
					 struct intel_connector *connector);

struct drm_crtc_state *intel_crtc_duplicate_state(struct drm_crtc *crtc);
void intel_crtc_destroy_state(struct drm_crtc *crtc,
			       struct drm_crtc_state *state);
void intel_crtc_free_hw_state(struct intel_crtc_state *crtc_state);
struct drm_atomic_commit *intel_atomic_state_alloc(struct drm_device *dev);
void intel_atomic_state_free(struct drm_atomic_commit *state);
void intel_atomic_state_clear(struct drm_atomic_commit *state);

struct intel_crtc_state *
intel_atomic_get_crtc_state(struct drm_atomic_commit *state,
			    struct intel_crtc *crtc);

#endif /* __INTEL_ATOMIC_H__ */

Annotation

• Immediate include surface: `linux/types.h`.
• Detected declarations: `struct drm_atomic_commit`, `struct drm_connector`, `struct drm_connector_state`, `struct drm_crtc`, `struct drm_crtc_state`, `struct drm_device`, `struct drm_property`, `struct intel_atomic_state`, `struct intel_connector`, `struct intel_crtc`.
• Atlas domain: Driver Families / drivers/gpu.
• Implementation status: source implementation candidate.
• Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.