drivers/gpu/drm/i915/display/intel_backlight.h

File Facts

System

Linux kernel

Corpus path

drivers/gpu/drm/i915/display/intel_backlight.h

Extension

.h

Size

1890 bytes

Lines

53

Domain

Driver Families

Bucket

drivers/gpu

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• linux/types.h

Detected Declarations

• struct drm_connector_state
• struct intel_atomic_state
• struct intel_connector
• struct intel_crtc_state
• struct intel_encoder
• struct intel_panel
• enum pipe
• function intel_backlight_device_register
• function intel_backlight_device_unregister

Annotated Snippet

#ifndef __INTEL_BACKLIGHT_H__
#define __INTEL_BACKLIGHT_H__

#include <linux/types.h>

struct drm_connector_state;
struct intel_atomic_state;
struct intel_connector;
struct intel_crtc_state;
struct intel_encoder;
struct intel_panel;
enum pipe;

void intel_backlight_init_funcs(struct intel_panel *panel);
int intel_backlight_setup(struct intel_connector *connector, enum pipe pipe);
void intel_backlight_destroy(struct intel_panel *panel);

void intel_backlight_enable(const struct intel_crtc_state *crtc_state,
			    const struct drm_connector_state *conn_state);
void intel_backlight_update(struct intel_atomic_state *state,
			    struct intel_encoder *encoder,
			    const struct intel_crtc_state *crtc_state,
			    const struct drm_connector_state *conn_state);
void intel_backlight_disable(const struct drm_connector_state *old_conn_state);

void intel_backlight_set_acpi(const struct drm_connector_state *conn_state,
			      u32 level, u32 max);
void intel_backlight_set_pwm_level(const struct drm_connector_state *conn_state,
				   u32 level);
u32 intel_backlight_invert_pwm_level(struct intel_connector *connector, u32 level);
u32 intel_backlight_level_to_pwm(struct intel_connector *connector, u32 level);
u32 intel_backlight_level_from_pwm(struct intel_connector *connector, u32 val);

#if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE)
int intel_backlight_device_register(struct intel_connector *connector);
void intel_backlight_device_unregister(struct intel_connector *connector);
#else /* CONFIG_BACKLIGHT_CLASS_DEVICE */
static inline int intel_backlight_device_register(struct intel_connector *connector)
{
	return 0;
}
static inline void intel_backlight_device_unregister(struct intel_connector *connector)
{
}
#endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */

#endif /* __INTEL_BACKLIGHT_H__ */

Annotation

• Immediate include surface: `linux/types.h`.
• Detected declarations: `struct drm_connector_state`, `struct intel_atomic_state`, `struct intel_connector`, `struct intel_crtc_state`, `struct intel_encoder`, `struct intel_panel`, `enum pipe`, `function intel_backlight_device_register`, `function intel_backlight_device_unregister`.
• Atlas domain: Driver Families / drivers/gpu.
• Implementation status: source implementation candidate.
• Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.