drivers/gpu/drm/i915/display/intel_bw.h

File Facts

System

Linux kernel

Corpus path

drivers/gpu/drm/i915/display/intel_bw.h

Extension

.h

Size

1352 bytes

Lines

43

Domain

Driver Families

Bucket

drivers/gpu

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• drm/drm_atomic.h

Detected Declarations

• struct intel_atomic_state
• struct intel_bw_state
• struct intel_crtc
• struct intel_crtc_state
• struct intel_display
• struct intel_global_state

Annotated Snippet

#ifndef __INTEL_BW_H__
#define __INTEL_BW_H__

#include <drm/drm_atomic.h>

struct intel_atomic_state;
struct intel_bw_state;
struct intel_crtc;
struct intel_crtc_state;
struct intel_display;
struct intel_global_state;

struct intel_bw_state *to_intel_bw_state(struct intel_global_state *obj_state);

struct intel_bw_state *
intel_atomic_get_old_bw_state(struct intel_atomic_state *state);

struct intel_bw_state *
intel_atomic_get_new_bw_state(struct intel_atomic_state *state);

struct intel_bw_state *
intel_atomic_get_bw_state(struct intel_atomic_state *state);

void intel_bw_init_hw(struct intel_display *display);
int intel_bw_init(struct intel_display *display);
int intel_bw_atomic_check(struct intel_atomic_state *state);
void intel_bw_update_hw_state(struct intel_display *display);
void intel_bw_crtc_disable_noatomic(struct intel_crtc *crtc);

bool intel_bw_pmdemand_needs_update(struct intel_atomic_state *state);
bool intel_bw_can_enable_sagv(struct intel_display *display,
			      const struct intel_bw_state *bw_state);
void icl_sagv_pre_plane_update(struct intel_atomic_state *state);
void icl_sagv_post_plane_update(struct intel_atomic_state *state);
int intel_bw_qgv_point_peakbw(const struct intel_bw_state *bw_state);

#endif /* __INTEL_BW_H__ */

Annotation

• Immediate include surface: `drm/drm_atomic.h`.
• Detected declarations: `struct intel_atomic_state`, `struct intel_bw_state`, `struct intel_crtc`, `struct intel_crtc_state`, `struct intel_display`, `struct intel_global_state`.
• Atlas domain: Driver Families / drivers/gpu.
• Implementation status: source implementation candidate.
• Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.