drivers/gpu/drm/i915/display/intel_casf.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/i915/display/intel_casf.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/i915/display/intel_casf.c- Extension
.c- Size
- 7092 bytes
- Lines
- 246
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
drm/drm_print.hintel_casf.hintel_casf_regs.hintel_de.hintel_display_regs.hintel_display_types.hskl_scaler.h
Detected Declarations
function intel_casf_filter_lut_loadfunction intel_casf_compute_win_sizefunction intel_casf_compute_configfunction intel_casf_sharpness_get_configfunction casf_coeff_tapfunction casf_coefffunction intel_casf_write_coefffunction convert_sharpness_coeff_binaryfunction intel_casf_scaler_compute_coefffunction intel_casf_setup
Annotated Snippet
// SPDX-License-Identifier: MIT
/* Copyright © 2025 Intel Corporation */
#include <drm/drm_print.h>
#include "intel_casf.h"
#include "intel_casf_regs.h"
#include "intel_de.h"
#include "intel_display_regs.h"
#include "intel_display_types.h"
#include "skl_scaler.h"
#define MAX_PIXELS_FOR_3_TAP_FILTER (1920 * 1080)
#define MAX_PIXELS_FOR_5_TAP_FILTER (3840 * 2160)
#define FILTER_COEFF_0_125 125
#define FILTER_COEFF_0_25 250
#define FILTER_COEFF_0_5 500
#define FILTER_COEFF_1_0 1000
#define FILTER_COEFF_0_0 0
#define SET_POSITIVE_SIGN(x) ((x) & (~SIGN))
/**
* DOC: Content Adaptive Sharpness Filter (CASF)
*
* Starting from LNL the display engine supports an
* adaptive sharpening filter, enhancing the image
* quality. The display hardware utilizes the second
* pipe scaler for implementing CASF.
* If sharpness is being enabled then pipe scaling
* cannot be used.
* This filter operates on a region of pixels based
* on the tap size. Coefficients are used to generate
* an alpha value which blends the sharpened image to
* original image.
*/
/* Default LUT values to be loaded one time. */
static const u16 sharpness_lut[] = {
4095, 2047, 1364, 1022, 816, 678, 579,
504, 444, 397, 357, 323, 293, 268, 244, 224,
204, 187, 170, 154, 139, 125, 111, 98, 85,
73, 60, 48, 36, 24, 12, 0
};
const u16 filtercoeff_1[] = {
FILTER_COEFF_0_0, FILTER_COEFF_0_0, FILTER_COEFF_0_5,
FILTER_COEFF_1_0, FILTER_COEFF_0_5, FILTER_COEFF_0_0,
FILTER_COEFF_0_0,
};
const u16 filtercoeff_2[] = {
FILTER_COEFF_0_0, FILTER_COEFF_0_25, FILTER_COEFF_0_5,
FILTER_COEFF_1_0, FILTER_COEFF_0_5, FILTER_COEFF_0_25,
FILTER_COEFF_0_0,
};
const u16 filtercoeff_3[] = {
FILTER_COEFF_0_125, FILTER_COEFF_0_25, FILTER_COEFF_0_5,
FILTER_COEFF_1_0, FILTER_COEFF_0_5, FILTER_COEFF_0_25,
FILTER_COEFF_0_125,
};
static void intel_casf_filter_lut_load(const struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(crtc_state);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
int i;
intel_de_write(display, SHRPLUT_INDEX(crtc->pipe),
INDEX_AUTO_INCR | INDEX_VALUE(0));
for (i = 0; i < ARRAY_SIZE(sharpness_lut); i++)
intel_de_write(display, SHRPLUT_DATA(crtc->pipe),
sharpness_lut[i]);
}
static void intel_casf_compute_win_size(struct intel_crtc_state *crtc_state)
{
const struct drm_display_mode *mode = &crtc_state->hw.adjusted_mode;
u32 total_pixels = mode->hdisplay * mode->vdisplay;
if (total_pixels <= MAX_PIXELS_FOR_3_TAP_FILTER)
crtc_state->pch_pfit.casf.win_size = SHARPNESS_FILTER_SIZE_3X3;
else if (total_pixels <= MAX_PIXELS_FOR_5_TAP_FILTER)
crtc_state->pch_pfit.casf.win_size = SHARPNESS_FILTER_SIZE_5X5;
else
crtc_state->pch_pfit.casf.win_size = SHARPNESS_FILTER_SIZE_7X7;
}
Annotation
- Immediate include surface: `drm/drm_print.h`, `intel_casf.h`, `intel_casf_regs.h`, `intel_de.h`, `intel_display_regs.h`, `intel_display_types.h`, `skl_scaler.h`.
- Detected declarations: `function intel_casf_filter_lut_load`, `function intel_casf_compute_win_size`, `function intel_casf_compute_config`, `function intel_casf_sharpness_get_config`, `function casf_coeff_tap`, `function casf_coeff`, `function intel_casf_write_coeff`, `function convert_sharpness_coeff_binary`, `function intel_casf_scaler_compute_coeff`, `function intel_casf_setup`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.