drivers/gpu/drm/i915/display/intel_combo_phy.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/i915/display/intel_combo_phy.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/i915/display/intel_combo_phy.c- Extension
.c- Size
- 11345 bytes
- Lines
- 418
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
drm/drm_print.hintel_combo_phy.hintel_combo_phy_regs.hintel_de.hintel_display_regs.hintel_display_types.hintel_display_utils.h
Detected Declarations
function icl_get_procmon_ref_valuesfunction icl_set_procmon_ref_valuesfunction check_phy_regfunction icl_verify_procmon_ref_valuesfunction has_phy_miscfunction icl_combo_phy_enabledfunction ehl_vbt_ddi_d_presentfunction phy_is_masterfunction icl_combo_phy_verify_statefunction intel_combo_phy_power_up_lanesfunction icl_combo_phys_initfunction for_each_combo_phyfunction icl_combo_phys_uninitfunction for_each_combo_phy_reversefunction intel_combo_phy_initfunction intel_combo_phy_uninit
Annotated Snippet
if (display->platform.jasperlake || display->platform.elkhartlake) {
if (ehl_vbt_ddi_d_present(display))
expected_val = ICL_PHY_MISC_MUX_DDID;
ret &= check_phy_reg(display, phy, ICL_PHY_MISC(phy),
ICL_PHY_MISC_MUX_DDID,
expected_val);
}
}
ret &= check_phy_reg(display, phy, ICL_PORT_CL_DW5(phy),
CL_POWER_DOWN_ENABLE, CL_POWER_DOWN_ENABLE);
return ret;
}
void intel_combo_phy_power_up_lanes(struct intel_display *display,
enum phy phy, bool is_dsi,
int lane_count, bool lane_reversal)
{
u8 lane_mask;
if (is_dsi) {
drm_WARN_ON(display->drm, lane_reversal);
switch (lane_count) {
case 1:
lane_mask = PWR_DOWN_LN_3_1_0;
break;
case 2:
lane_mask = PWR_DOWN_LN_3_1;
break;
case 3:
lane_mask = PWR_DOWN_LN_3;
break;
default:
MISSING_CASE(lane_count);
fallthrough;
case 4:
lane_mask = PWR_UP_ALL_LANES;
break;
}
} else {
switch (lane_count) {
case 1:
lane_mask = lane_reversal ? PWR_DOWN_LN_2_1_0 :
PWR_DOWN_LN_3_2_1;
break;
case 2:
lane_mask = lane_reversal ? PWR_DOWN_LN_1_0 :
PWR_DOWN_LN_3_2;
break;
default:
MISSING_CASE(lane_count);
fallthrough;
case 4:
lane_mask = PWR_UP_ALL_LANES;
break;
}
}
intel_de_rmw(display, ICL_PORT_CL_DW10(phy),
PWR_DOWN_LN_MASK, lane_mask);
}
static void icl_combo_phys_init(struct intel_display *display)
{
enum phy phy;
for_each_combo_phy(display, phy) {
const struct icl_procmon *procmon;
u32 val;
if (icl_combo_phy_verify_state(display, phy))
continue;
procmon = icl_get_procmon_ref_values(display, phy);
drm_dbg_kms(display->drm,
"Initializing combo PHY %c (Voltage/Process Info : %s)\n",
phy_name(phy), procmon->name);
if (!has_phy_misc(display, phy))
goto skip_phy_misc;
/*
* EHL's combo PHY A can be hooked up to either an external
* display (via DDI-D) or an internal display (via DDI-A or
* the DSI DPHY). This is a motherboard design decision that
* can't be changed on the fly, so initialize the PHY's mux
Annotation
- Immediate include surface: `drm/drm_print.h`, `intel_combo_phy.h`, `intel_combo_phy_regs.h`, `intel_de.h`, `intel_display_regs.h`, `intel_display_types.h`, `intel_display_utils.h`.
- Detected declarations: `function icl_get_procmon_ref_values`, `function icl_set_procmon_ref_values`, `function check_phy_reg`, `function icl_verify_procmon_ref_values`, `function has_phy_misc`, `function icl_combo_phy_enabled`, `function ehl_vbt_ddi_d_present`, `function phy_is_master`, `function icl_combo_phy_verify_state`, `function intel_combo_phy_power_up_lanes`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.