drivers/gpu/drm/i915/display/intel_crt.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/i915/display/intel_crt.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/i915/display/intel_crt.c
Extension
.c
Size
33177 bytes
Lines
1140
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct intel_crt {
	struct intel_encoder base;
	bool force_hotplug_required;
	intel_reg_t adpa_reg;
};

static struct intel_crt *intel_encoder_to_crt(struct intel_encoder *encoder)
{
	return container_of(encoder, struct intel_crt, base);
}

static struct intel_crt *intel_attached_crt(struct intel_connector *connector)
{
	return intel_encoder_to_crt(intel_attached_encoder(connector));
}

bool intel_crt_port_enabled(struct intel_display *display,
			    intel_reg_t adpa_reg, enum pipe *pipe)
{
	u32 val;

	val = intel_de_read(display, adpa_reg);

	/* asserts want to know the pipe even if the port is disabled */
	if (HAS_PCH_CPT(display))
		*pipe = REG_FIELD_GET(ADPA_PIPE_SEL_MASK_CPT, val);
	else
		*pipe = REG_FIELD_GET(ADPA_PIPE_SEL_MASK, val);

	return val & ADPA_DAC_ENABLE;
}

static bool intel_crt_get_hw_state(struct intel_encoder *encoder,
				   enum pipe *pipe)
{
	struct intel_display *display = to_intel_display(encoder);
	struct intel_crt *crt = intel_encoder_to_crt(encoder);
	struct ref_tracker *wakeref;
	bool ret;

	wakeref = intel_display_power_get_if_enabled(display,
						     encoder->power_domain);
	if (!wakeref)
		return false;

	ret = intel_crt_port_enabled(display, crt->adpa_reg, pipe);

	intel_display_power_put(display, encoder->power_domain, wakeref);

	return ret;
}

static unsigned int intel_crt_get_flags(struct intel_encoder *encoder)
{
	struct intel_display *display = to_intel_display(encoder);
	struct intel_crt *crt = intel_encoder_to_crt(encoder);
	u32 tmp, flags = 0;

	tmp = intel_de_read(display, crt->adpa_reg);

	if (tmp & ADPA_HSYNC_ACTIVE_HIGH)
		flags |= DRM_MODE_FLAG_PHSYNC;
	else
		flags |= DRM_MODE_FLAG_NHSYNC;

	if (tmp & ADPA_VSYNC_ACTIVE_HIGH)
		flags |= DRM_MODE_FLAG_PVSYNC;
	else
		flags |= DRM_MODE_FLAG_NVSYNC;

	return flags;
}

static void intel_crt_get_config(struct intel_encoder *encoder,
				 struct intel_crtc_state *crtc_state)
{
	crtc_state->output_types |= BIT(INTEL_OUTPUT_ANALOG);

	crtc_state->hw.adjusted_mode.flags |= intel_crt_get_flags(encoder);

	crtc_state->hw.adjusted_mode.crtc_clock = crtc_state->port_clock;
}

static void hsw_crt_get_config(struct intel_encoder *encoder,
			       struct intel_crtc_state *crtc_state)
{
	lpt_pch_get_config(crtc_state);

	hsw_ddi_get_config(encoder, crtc_state);

Annotation

Implementation Notes