drivers/gpu/drm/i915/display/intel_display_device.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/i915/display/intel_display_device.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/i915/display/intel_display_device.c- Extension
.c- Size
- 55116 bytes
- Lines
- 2014
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/pci.hdrm/drm_color_mgmt.hdrm/drm_drv.hdrm/drm_print.hdrm/intel/pciids.hdrm/intel/step.hintel_cx0_phy_regs.hintel_de.hintel_display.hintel_display_device.hintel_display_params.hintel_display_power.hintel_display_reg_defs.hintel_display_regs.hintel_display_types.hintel_display_wa.hintel_fbc.h
Detected Declarations
struct stepping_descstruct subplatform_descstruct platform_descfunction BITfunction BITfunction BITfunction BITfunction SUBPLATFORMfunction SUBPLATFORMfunction SUBPLATFORMfunction SUBPLATFORMfunction SUBPLATFORMfunction has_no_displayfunction probe_gmdid_displayfunction find_subplatform_descfunction get_pre_gmdid_stepfunction display_platforms_num_bitsfunction display_platforms_weightfunction display_platforms_orfunction initialize_stepfunction intel_display_device_removefunction __intel_display_device_info_runtime_initfunction intel_display_device_info_runtime_initfunction intel_display_device_info_printfunction intel_display_device_presentfunction intel_display_device_enabled
Annotated Snippet
struct stepping_desc {
const enum intel_step *map; /* revid to step map */
size_t size; /* map size */
};
#define STEP_INFO(_map) \
.step_info.map = _map, \
.step_info.size = ARRAY_SIZE(_map)
struct subplatform_desc {
struct intel_display_platforms platforms;
const char *name;
const u16 *pciidlist;
struct stepping_desc step_info;
};
#define SUBPLATFORM(_platform, _subplatform) \
.platforms._platform##_##_subplatform = 1, \
.name = #_subplatform
/*
* Group subplatform alias that matches multiple subplatforms. For making ult
* cover both ult and ulx on HSW/BDW.
*/
#define SUBPLATFORM_GROUP(_platform, _subplatform) \
.platforms._platform##_##_subplatform = 1
struct platform_desc {
struct intel_display_platforms platforms;
const char *name;
const struct subplatform_desc *subplatforms;
const struct intel_display_device_info *info; /* NULL for GMD ID */
struct stepping_desc step_info;
};
#define PLATFORM(_platform) \
.platforms._platform = 1, \
.name = #_platform
/*
* Group platform alias that matches multiple platforms. For aliases such as g4x
* that covers both g45 and gm45.
*/
#define PLATFORM_GROUP(_platform) \
.platforms._platform = 1
#define ID(id) (id)
static const struct intel_display_device_info no_display = {};
#define PIPE_A_OFFSET 0x70000
#define PIPE_B_OFFSET 0x71000
#define PIPE_C_OFFSET 0x72000
#define PIPE_D_OFFSET 0x73000
#define CHV_PIPE_C_OFFSET 0x74000
/*
* There's actually no pipe EDP. Some pipe registers have
* simply shifted from the pipe to the transcoder, while
* keeping their original offset. Thus we need PIPE_EDP_OFFSET
* to access such registers in transcoder EDP.
*/
#define PIPE_EDP_OFFSET 0x7f000
/* ICL DSI 0 and 1 */
#define PIPE_DSI0_OFFSET 0x7b000
#define PIPE_DSI1_OFFSET 0x7b800
#define TRANSCODER_A_OFFSET 0x60000
#define TRANSCODER_B_OFFSET 0x61000
#define TRANSCODER_C_OFFSET 0x62000
#define CHV_TRANSCODER_C_OFFSET 0x63000
#define TRANSCODER_D_OFFSET 0x63000
#define TRANSCODER_EDP_OFFSET 0x6f000
#define TRANSCODER_DSI0_OFFSET 0x6b000
#define TRANSCODER_DSI1_OFFSET 0x6b800
#define CURSOR_A_OFFSET 0x70080
#define CURSOR_B_OFFSET 0x700c0
#define CHV_CURSOR_C_OFFSET 0x700e0
#define IVB_CURSOR_B_OFFSET 0x71080
#define IVB_CURSOR_C_OFFSET 0x72080
#define TGL_CURSOR_D_OFFSET 0x73080
#define I845_PIPE_OFFSETS \
.pipe_offsets = { \
[TRANSCODER_A] = PIPE_A_OFFSET, \
}, \
.trans_offsets = { \
[TRANSCODER_A] = TRANSCODER_A_OFFSET, \
}
Annotation
- Immediate include surface: `linux/pci.h`, `drm/drm_color_mgmt.h`, `drm/drm_drv.h`, `drm/drm_print.h`, `drm/intel/pciids.h`, `drm/intel/step.h`, `intel_cx0_phy_regs.h`, `intel_de.h`.
- Detected declarations: `struct stepping_desc`, `struct subplatform_desc`, `struct platform_desc`, `function BIT`, `function BIT`, `function BIT`, `function BIT`, `function SUBPLATFORM`, `function SUBPLATFORM`, `function SUBPLATFORM`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.