drivers/gpu/drm/i915/display/intel_display_power.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/i915/display/intel_display_power.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/i915/display/intel_display_power.h- Extension
.h- Size
- 10058 bytes
- Lines
- 316
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/mutex.hlinux/workqueue.h
Detected Declarations
struct i915_power_wellstruct intel_displaystruct intel_encoderstruct ref_trackerstruct seq_filestruct intel_power_domain_maskstruct i915_power_domainsstruct intel_display_power_domain_setenum aux_chenum portenum intel_display_power_domainenum dbuf_slicefunction intel_display_power_put_asyncfunction intel_display_power_put_async_delayfunction intel_display_power_putfunction intel_display_power_put_asyncfunction intel_display_power_put_async_delayfunction intel_display_power_put_all_in_set
Annotated Snippet
struct intel_power_domain_mask {
DECLARE_BITMAP(bits, POWER_DOMAIN_NUM);
};
struct i915_power_domains {
/*
* Power wells needed for initialization at driver init and suspend
* time are on. They are kept on until after the first modeset.
*/
bool initializing;
bool display_core_suspended;
int power_well_count;
u32 dc_state;
u32 target_dc_state;
u32 allowed_dc_mask;
struct ref_tracker *init_wakeref;
struct ref_tracker *disable_wakeref;
struct mutex lock;
int domain_use_count[POWER_DOMAIN_NUM];
struct delayed_work async_put_work;
struct ref_tracker *async_put_wakeref;
struct intel_power_domain_mask async_put_domains[2];
int async_put_next_delay;
struct i915_power_well *power_wells;
};
struct intel_display_power_domain_set {
struct intel_power_domain_mask mask;
#ifdef CONFIG_DRM_I915_DEBUG_RUNTIME_PM
struct ref_tracker *wakerefs[POWER_DOMAIN_NUM];
#endif
};
#define for_each_power_domain(__domain, __mask) \
for ((__domain) = 0; (__domain) < POWER_DOMAIN_NUM; (__domain)++) \
for_each_if(test_bit((__domain), (__mask)->bits))
int intel_display_power_init(struct intel_display *display);
void intel_display_power_cleanup(struct intel_display *display);
void intel_display_power_init_hw(struct intel_display *display);
void intel_display_power_driver_remove(struct intel_display *display);
void intel_display_power_enable(struct intel_display *display);
void intel_display_power_disable(struct intel_display *display);
void intel_display_power_sanitize_state(struct intel_display *display);
void intel_display_power_suspend_late(struct intel_display *display, bool s2idle);
void intel_display_power_resume_early(struct intel_display *display);
void intel_display_power_set_target_dc_state(struct intel_display *display,
u32 state);
u32 intel_display_power_get_current_dc_state(struct intel_display *display);
void intel_display_power_runtime_suspend(struct intel_display *display);
void intel_display_power_runtime_resume(struct intel_display *display);
bool intel_display_power_is_enabled(struct intel_display *display,
enum intel_display_power_domain domain);
struct ref_tracker *intel_display_power_get(struct intel_display *display,
enum intel_display_power_domain domain);
struct ref_tracker *
intel_display_power_get_if_enabled(struct intel_display *display,
enum intel_display_power_domain domain);
void __intel_display_power_put_async(struct intel_display *display,
enum intel_display_power_domain domain,
struct ref_tracker *wakeref,
int delay_ms);
void intel_display_power_flush_work(struct intel_display *display);
#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
void intel_display_power_put(struct intel_display *display,
enum intel_display_power_domain domain,
struct ref_tracker *wakeref);
static inline void
intel_display_power_put_async(struct intel_display *display,
enum intel_display_power_domain domain,
struct ref_tracker *wakeref)
{
__intel_display_power_put_async(display, domain, wakeref, -1);
}
static inline void
intel_display_power_put_async_delay(struct intel_display *display,
enum intel_display_power_domain domain,
struct ref_tracker *wakeref,
int delay_ms)
{
__intel_display_power_put_async(display, domain, wakeref, delay_ms);
Annotation
- Immediate include surface: `linux/mutex.h`, `linux/workqueue.h`.
- Detected declarations: `struct i915_power_well`, `struct intel_display`, `struct intel_encoder`, `struct ref_tracker`, `struct seq_file`, `struct intel_power_domain_mask`, `struct i915_power_domains`, `struct intel_display_power_domain_set`, `enum aux_ch`, `enum port`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.