drivers/gpu/drm/i915/display/intel_display_power_well.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/i915/display/intel_display_power_well.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/i915/display/intel_display_power_well.c- Extension
.c- Size
- 64158 bytes
- Lines
- 2121
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/iopoll.hdrm/drm_print.hdrm/intel/intel_pcode_regs.hintel_backlight_regs.hintel_combo_phy.hintel_combo_phy_regs.hintel_crt.hintel_de.hintel_display_irq.hintel_display_power_well.hintel_display_regs.hintel_display_rpm.hintel_display_types.hintel_display_wa.hintel_dkl_phy.hintel_dkl_phy_regs.hintel_dmc.hintel_dmc_wl.hintel_dp_aux_regs.hintel_dpio_phy.hintel_dpll.hintel_hotplug.hintel_parent.hintel_pps.hintel_psr.hintel_tc.hintel_vga.hskl_watermark.hvlv_dpio_phy_regs.hvlv_sideband.h
Detected Declarations
struct i915_power_well_regsstruct i915_power_well_opsfunction pw_idx_to_pgfunction i915_power_well_instancefunction lookup_power_wellfunction intel_power_well_enablefunction intel_power_well_disablefunction intel_power_well_sync_hwfunction intel_power_well_getfunction intel_power_well_putfunction intel_power_well_is_enabledfunction intel_power_well_is_enabled_cachedfunction intel_display_power_well_is_enabledfunction intel_power_well_is_always_onfunction intel_power_well_refcountfunction dss_pipe_gating_bitsfunction dss_pipe_gating_enable_disablefunction hsw_power_well_post_enablefunction hsw_power_well_pre_disablefunction icl_aux_pw_to_chfunction aux_ch_to_digital_portfunction for_each_intel_encoderfunction icl_aux_pw_to_encoderfunction icl_aux_pw_to_phyfunction icl_aux_pw_is_tc_phyfunction hsw_wait_for_power_well_enablefunction HSW_PWR_WELL_CTL_STATEfunction hsw_power_well_requestersfunction hsw_wait_for_power_well_disablefunction gen9_wait_for_power_well_fusesfunction hsw_power_well_enablefunction hsw_power_well_disablefunction intel_aux_ch_is_edpfunction icl_combo_phy_aux_power_well_enablefunction icl_combo_phy_aux_power_well_disablefunction icl_tc_port_assert_ref_heldfunction icl_tc_port_assert_ref_heldfunction icl_tc_phy_aux_power_well_enablefunction icl_aux_power_well_enablefunction icl_aux_power_well_disablefunction hsw_power_well_enabledfunction assert_can_enable_dc9function assert_can_disable_dc9function gen9_write_dc_statefunction gen9_dc_maskfunction gen9_sanitize_dc_statefunction statefunction tgl_enable_dc3co
Annotated Snippet
struct i915_power_well_regs {
intel_reg_t bios;
intel_reg_t driver;
intel_reg_t kvmr;
intel_reg_t debug;
};
struct i915_power_well_ops {
const struct i915_power_well_regs *regs;
/*
* Synchronize the well's hw state to match the current sw state, for
* example enable/disable it based on the current refcount. Called
* during driver init and resume time, possibly after first calling
* the enable/disable handlers.
*/
void (*sync_hw)(struct intel_display *display,
struct i915_power_well *power_well);
/*
* Enable the well and resources that depend on it (for example
* interrupts located on the well). Called after the 0->1 refcount
* transition.
*/
void (*enable)(struct intel_display *display,
struct i915_power_well *power_well);
/*
* Disable the well and resources that depend on it. Called after
* the 1->0 refcount transition.
*/
void (*disable)(struct intel_display *display,
struct i915_power_well *power_well);
/* Returns the hw enabled state. */
bool (*is_enabled)(struct intel_display *display,
struct i915_power_well *power_well);
};
static const struct i915_power_well_instance *
i915_power_well_instance(const struct i915_power_well *power_well)
{
return &power_well->desc->instances->list[power_well->instance_idx];
}
struct i915_power_well *
lookup_power_well(struct intel_display *display,
enum i915_power_well_id power_well_id)
{
struct i915_power_well *power_well;
for_each_power_well(display, power_well)
if (i915_power_well_instance(power_well)->id == power_well_id)
return power_well;
/*
* It's not feasible to add error checking code to the callers since
* this condition really shouldn't happen and it doesn't even make sense
* to abort things like display initialization sequences. Just return
* the first power well and hope the WARN gets reported so we can fix
* our driver.
*/
drm_WARN(display->drm, 1,
"Power well %d not defined for this platform\n",
power_well_id);
return &display->power.domains.power_wells[0];
}
void intel_power_well_enable(struct intel_display *display,
struct i915_power_well *power_well)
{
drm_dbg_kms(display->drm, "enabling %s\n", intel_power_well_name(power_well));
power_well->desc->ops->enable(display, power_well);
power_well->hw_enabled = true;
}
void intel_power_well_disable(struct intel_display *display,
struct i915_power_well *power_well)
{
drm_dbg_kms(display->drm, "disabling %s\n", intel_power_well_name(power_well));
power_well->hw_enabled = false;
power_well->desc->ops->disable(display, power_well);
}
void intel_power_well_sync_hw(struct intel_display *display,
struct i915_power_well *power_well)
{
power_well->desc->ops->sync_hw(display, power_well);
power_well->hw_enabled = power_well->desc->ops->is_enabled(display, power_well);
}
void intel_power_well_get(struct intel_display *display,
struct i915_power_well *power_well)
{
Annotation
- Immediate include surface: `linux/iopoll.h`, `drm/drm_print.h`, `drm/intel/intel_pcode_regs.h`, `intel_backlight_regs.h`, `intel_combo_phy.h`, `intel_combo_phy_regs.h`, `intel_crt.h`, `intel_de.h`.
- Detected declarations: `struct i915_power_well_regs`, `struct i915_power_well_ops`, `function pw_idx_to_pg`, `function i915_power_well_instance`, `function lookup_power_well`, `function intel_power_well_enable`, `function intel_power_well_disable`, `function intel_power_well_sync_hw`, `function intel_power_well_get`, `function intel_power_well_put`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.