drivers/gpu/drm/i915/display/intel_dmc.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/i915/display/intel_dmc.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/i915/display/intel_dmc.c- Extension
.c- Size
- 49862 bytes
- Lines
- 1786
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/debugfs.hlinux/firmware.hdrm/drm_vblank.hdrm/drm_file.hdrm/drm_print.hintel_crtc.hintel_de.hintel_display_power_well.hintel_display_regs.hintel_display_rpm.hintel_display_types.hintel_display_utils.hintel_dmc.hintel_dmc_regs.hintel_flipq.h
Detected Declarations
struct intel_dmcstruct dmc_fw_infostruct intel_css_headerstruct intel_fw_infostruct intel_package_headerstruct intel_dmc_header_basestruct intel_dmc_header_v1struct intel_dmc_header_v3struct stepping_infostruct intel_dmc_snapshotenum intel_dmc_idfunction dmc_firmware_param_disabledfunction is_valid_dmc_idfunction has_dmc_id_fwfunction intel_dmc_has_payloadfunction initialize_stepping_infofunction gen9_set_dc_state_debugmaskfunction disable_event_handlerfunction disable_all_event_handlersfunction adlp_pipedmc_clock_gating_wafunction mtl_pipedmc_clock_gating_wafunction pipedmc_clock_gating_wafunction pipedmc_interrupt_maskfunction dmc_evt_ctl_disablefunction is_dmc_evt_ctl_regfunction is_dmc_evt_htp_regfunction is_event_handlerfunction fixup_dmc_evtfunction is_event_handlerfunction is_event_handlerfunction disable_dmc_evtfunction dmc_mmiodatafunction dmc_load_mmiofunction dmc_load_programfunction assert_dmc_loadedfunction assert_main_dmc_loadedfunction need_pipedmc_load_programfunction need_pipedmc_load_mmiofunction can_enable_pipedmcfunction intel_dmc_enable_pipefunction intel_dmc_disable_pipefunction dmc_configure_eventfunction intel_dmc_configure_dc_balance_eventfunction intel_dmc_block_pkgcfunction intel_dmc_start_pkgc_exit_at_start_of_undelayed_vblankfunction intel_dmc_load_programfunction for_each_dmc_idfunction intel_dmc_disable_program
Annotated Snippet
struct intel_dmc {
struct intel_display *display;
struct work_struct work;
const char *fw_path;
u32 max_fw_size; /* bytes */
u32 version;
struct {
u32 dc5_start;
u32 count;
} dc6_allowed;
struct dmc_fw_info {
u32 mmio_count;
intel_reg_t mmioaddr[20];
u32 mmiodata[20];
u32 dmc_offset;
u32 start_mmioaddr;
u32 dmc_fw_size; /*dwords */
u32 *payload;
bool present;
} dmc_info[DMC_FW_MAX];
};
/* Note: This may be NULL. */
static struct intel_dmc *display_to_dmc(struct intel_display *display)
{
return display->dmc.dmc;
}
static const char *dmc_firmware_param(struct intel_display *display)
{
const char *p = display->params.dmc_firmware_path;
return p && *p ? p : NULL;
}
static bool dmc_firmware_param_disabled(struct intel_display *display)
{
const char *p = dmc_firmware_param(display);
/* Magic path to indicate disabled */
return p && !strcmp(p, "/dev/null");
}
#define DMC_VERSION(major, minor) ((major) << 16 | (minor))
#define DMC_VERSION_MAJOR(version) ((version) >> 16)
#define DMC_VERSION_MINOR(version) ((version) & 0xffff)
#define DMC_PATH(platform) \
"i915/" __stringify(platform) "_dmc.bin"
/*
* New DMC additions should not use this. This is used solely to remain
* compatible with systems that have not yet updated DMC blobs to use
* unversioned file names.
*/
#define DMC_LEGACY_PATH(platform, major, minor) \
"i915/" \
__stringify(platform) "_dmc_ver" \
__stringify(major) "_" \
__stringify(minor) ".bin"
#define XE2LPD_DMC_MAX_FW_SIZE 0x8000
#define XELPDP_DMC_MAX_FW_SIZE 0x7000
#define DISPLAY_VER13_DMC_MAX_FW_SIZE 0x20000
#define DISPLAY_VER12_DMC_MAX_FW_SIZE ICL_DMC_MAX_FW_SIZE
#define XE3P_LPD_DMC_PATH DMC_PATH(xe3p_lpd)
MODULE_FIRMWARE(XE3P_LPD_DMC_PATH);
#define XE3LPD_3002_DMC_PATH DMC_PATH(xe3lpd_3002)
MODULE_FIRMWARE(XE3LPD_3002_DMC_PATH);
#define XE3LPD_DMC_PATH DMC_PATH(xe3lpd)
MODULE_FIRMWARE(XE3LPD_DMC_PATH);
#define XE2LPD_DMC_PATH DMC_PATH(xe2lpd)
MODULE_FIRMWARE(XE2LPD_DMC_PATH);
#define BMG_DMC_PATH DMC_PATH(bmg)
MODULE_FIRMWARE(BMG_DMC_PATH);
#define MTL_DMC_PATH DMC_PATH(mtl)
MODULE_FIRMWARE(MTL_DMC_PATH);
#define DG2_DMC_PATH DMC_LEGACY_PATH(dg2, 2, 08)
MODULE_FIRMWARE(DG2_DMC_PATH);
#define ADLP_DMC_PATH DMC_PATH(adlp)
#define ADLP_DMC_FALLBACK_PATH DMC_LEGACY_PATH(adlp, 2, 16)
MODULE_FIRMWARE(ADLP_DMC_PATH);
Annotation
- Immediate include surface: `linux/debugfs.h`, `linux/firmware.h`, `drm/drm_vblank.h`, `drm/drm_file.h`, `drm/drm_print.h`, `intel_crtc.h`, `intel_de.h`, `intel_display_power_well.h`.
- Detected declarations: `struct intel_dmc`, `struct dmc_fw_info`, `struct intel_css_header`, `struct intel_fw_info`, `struct intel_package_header`, `struct intel_dmc_header_base`, `struct intel_dmc_header_v1`, `struct intel_dmc_header_v3`, `struct stepping_info`, `struct intel_dmc_snapshot`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.