drivers/gpu/drm/i915/display/intel_dp_aux.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/i915/display/intel_dp_aux.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/i915/display/intel_dp_aux.c
Extension
.c
Size
24572 bytes
Lines
930
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

switch (index) {
		case 0: return 63;
		case 1: return 72;
		default: return 0;
		}
	}

	return ilk_get_aux_clock_divider(intel_dp, index);
}

static u32 skl_get_aux_clock_divider(struct intel_dp *intel_dp, int index)
{
	/*
	 * SKL doesn't need us to program the AUX clock divider (Hardware will
	 * derive the clock from CDCLK automatically). We still implement the
	 * get_aux_clock_divider vfunc to plug-in into the existing code.
	 */
	return index ? 0 : 1;
}

static int intel_dp_aux_sync_len(void)
{
	int precharge = 16; /* 10-16 */
	int preamble = 16;

	return precharge + preamble;
}

int intel_dp_aux_fw_sync_len(struct intel_dp *intel_dp)
{
	int precharge = 10; /* 10-16 */
	int preamble = 8;

	/*
	 * We faced some glitches on Dell Precision 5490 MTL laptop with panel:
	 * "Manufacturer: AUO, Model: 63898" when using HW default 18. Using 20
	 * is fixing these problems with the panel. It is still within range
	 * mentioned in eDP specification. Increasing Fast Wake sync length is
	 * causing problems with other panels: increase length as a quirk for
	 * this specific laptop.
	 */
	if (intel_has_dpcd_quirk(intel_dp, QUIRK_FW_SYNC_LEN))
		precharge += 2;

	return precharge + preamble;
}

static int g4x_dp_aux_precharge_len(void)
{
	int precharge_min = 10;
	int preamble = 16;

	/* HW wants the length of the extra precharge in 2us units */
	return (intel_dp_aux_sync_len() -
		precharge_min - preamble) / 2;
}

static u32 g4x_get_aux_send_ctl(struct intel_dp *intel_dp,
				int send_bytes,
				u32 aux_clock_divider)
{
	struct intel_display *display = to_intel_display(intel_dp);
	u32 timeout;

	/* Max timeout value on G4x-BDW: 1.6ms */
	if (display->platform.broadwell)
		timeout = DP_AUX_CH_CTL_TIME_OUT_600us;
	else
		timeout = DP_AUX_CH_CTL_TIME_OUT_400us;

	return DP_AUX_CH_CTL_SEND_BUSY |
		DP_AUX_CH_CTL_DONE |
		DP_AUX_CH_CTL_INTERRUPT |
		DP_AUX_CH_CTL_TIME_OUT_ERROR |
		timeout |
		DP_AUX_CH_CTL_RECEIVE_ERROR |
		DP_AUX_CH_CTL_MESSAGE_SIZE(send_bytes) |
		DP_AUX_CH_CTL_PRECHARGE_2US(g4x_dp_aux_precharge_len()) |
		DP_AUX_CH_CTL_BIT_CLOCK_2X(aux_clock_divider);
}

static u32 skl_get_aux_send_ctl(struct intel_dp *intel_dp,
				int send_bytes,
				u32 unused)
{
	struct intel_display *display = to_intel_display(intel_dp);
	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
	u32 ret;

	/*

Annotation

Implementation Notes