drivers/gpu/drm/i915/display/intel_dpll_mgr.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/i915/display/intel_dpll_mgr.c- Extension
.c- Size
- 149878 bytes
- Lines
- 5191
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/math.hlinux/string_helpers.hdrm/drm_print.hdrm/intel/step.hbxt_dpio_phy_regs.hintel_cx0_phy.hintel_de.hintel_display_regs.hintel_display_types.hintel_display_utils.hintel_dkl_phy.hintel_dkl_phy_regs.hintel_dpio_phy.hintel_dpll.hintel_dpll_mgr.hintel_hti.hintel_lt_phy.hintel_mg_phy_regs.hintel_pch_refclk.hintel_tc.h
Detected Declarations
struct intel_dpll_funcsstruct intel_dpll_mgrstruct hsw_wrpll_rnpstruct skl_dpll_regsstruct skl_wrpll_contextstruct skl_wrpll_paramsstruct icl_combo_pll_paramsfunction intel_atomic_duplicate_dpll_statefunction intel_atomic_get_dpll_statefunction intel_get_dpll_by_idfunction for_each_dpllfunction assert_dpllfunction icl_pll_id_to_tc_portfunction icl_tc_port_to_pll_idfunction mtl_port_to_pll_idfunction intel_combo_pll_enable_regfunction intel_tc_pll_enable_regfunction _intel_enable_shared_dpllfunction _intel_disable_shared_dpllfunction intel_dpll_enablefunction intel_dpll_disablefunction intel_dpll_mask_allfunction for_each_dpllfunction intel_find_dpllfunction for_each_set_bitfunction intel_dpll_crtc_getfunction intel_reference_dpllfunction intel_dpll_crtc_putfunction intel_unreference_dpllfunction intel_put_dpllfunction drm_atomic_helper_swap_statefunction ibx_pch_dpll_get_hw_statefunction ibx_assert_pch_refclk_enabledfunction ibx_pch_dpll_enablefunction ibx_pch_dpll_disablefunction ibx_compute_dpllfunction ibx_get_dpllfunction ibx_dump_hw_statefunction ibx_compare_hw_statefunction hsw_ddi_wrpll_enablefunction hsw_ddi_spll_enablefunction hsw_ddi_wrpll_disablefunction hsw_ddi_spll_disablefunction hsw_ddi_wrpll_get_hw_statefunction hsw_ddi_spll_get_hw_statefunction hsw_wrpll_get_budget_for_freqfunction hsw_wrpll_update_rnpfunction hsw_ddi_calculate_wrpll
Annotated Snippet
struct intel_dpll_funcs {
/*
* Hook for enabling the pll, called from intel_enable_dpll() if
* the pll is not already enabled.
*/
void (*enable)(struct intel_display *display,
struct intel_dpll *pll,
const struct intel_dpll_hw_state *dpll_hw_state);
/*
* Hook for disabling the pll, called from intel_disable_dpll()
* only when it is safe to disable the pll, i.e., there are no more
* tracked users for it.
*/
void (*disable)(struct intel_display *display,
struct intel_dpll *pll);
/*
* Hook for reading the values currently programmed to the DPLL
* registers. This is used for initial hw state readout and state
* verification after a mode set.
*/
bool (*get_hw_state)(struct intel_display *display,
struct intel_dpll *pll,
struct intel_dpll_hw_state *dpll_hw_state);
/*
* Hook for calculating the pll's output frequency based on its passed
* in state.
*/
int (*get_freq)(struct intel_display *i915,
const struct intel_dpll *pll,
const struct intel_dpll_hw_state *dpll_hw_state);
};
struct intel_dpll_mgr {
const struct dpll_info *dpll_info;
int (*compute_dplls)(struct intel_atomic_state *state,
struct intel_crtc *crtc,
struct intel_encoder *encoder);
int (*get_dplls)(struct intel_atomic_state *state,
struct intel_crtc *crtc,
struct intel_encoder *encoder);
void (*put_dplls)(struct intel_atomic_state *state,
struct intel_crtc *crtc);
void (*update_active_dpll)(struct intel_atomic_state *state,
struct intel_crtc *crtc,
struct intel_encoder *encoder);
void (*update_ref_clks)(struct intel_display *display);
void (*dump_hw_state)(struct drm_printer *p,
const struct intel_dpll_hw_state *dpll_hw_state);
bool (*compare_hw_state)(const struct intel_dpll_hw_state *a,
const struct intel_dpll_hw_state *b);
};
static void
intel_atomic_duplicate_dpll_state(struct intel_display *display,
struct intel_dpll_state *dpll_state)
{
struct intel_dpll *pll;
int i;
/* Copy dpll state */
for_each_dpll(display, pll, i)
dpll_state[pll->index] = pll->state;
}
static struct intel_dpll_state *
intel_atomic_get_dpll_state(struct drm_atomic_commit *s)
{
struct intel_atomic_state *state = to_intel_atomic_state(s);
struct intel_display *display = to_intel_display(state);
drm_WARN_ON(s->dev, !drm_modeset_is_locked(&s->dev->mode_config.connection_mutex));
if (!state->dpll_set) {
state->dpll_set = true;
intel_atomic_duplicate_dpll_state(display,
state->dpll_state);
}
return state->dpll_state;
}
/**
* intel_get_dpll_by_id - get a DPLL given its id
* @display: intel_display device instance
* @id: pll id
Annotation
- Immediate include surface: `linux/math.h`, `linux/string_helpers.h`, `drm/drm_print.h`, `drm/intel/step.h`, `bxt_dpio_phy_regs.h`, `intel_cx0_phy.h`, `intel_de.h`, `intel_display_regs.h`.
- Detected declarations: `struct intel_dpll_funcs`, `struct intel_dpll_mgr`, `struct hsw_wrpll_rnp`, `struct skl_dpll_regs`, `struct skl_wrpll_context`, `struct skl_wrpll_params`, `struct icl_combo_pll_params`, `function intel_atomic_duplicate_dpll_state`, `function intel_atomic_get_dpll_state`, `function intel_get_dpll_by_id`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.