drivers/gpu/drm/i915/display/intel_dsb.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/i915/display/intel_dsb.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/i915/display/intel_dsb.c
Extension
.c
Size
32641 bytes
Lines
1126
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct intel_dsb {
	enum intel_dsb_id id;

	struct intel_dsb_buffer *dsb_buf;
	struct intel_crtc *crtc;

	/*
	 * maximum number of dwords the buffer will hold.
	 */
	unsigned int size;

	/*
	 * free_pos will point the first free dword and
	 * help in calculating tail of command buffer.
	 */
	unsigned int free_pos;

	/*
	 * Previously emitted DSB instruction. Used to
	 * identify/adjust the instruction for indexed
	 * register writes.
	 */
	u32 ins[2];

	/*
	 * Start of the previously emitted DSB instruction.
	 * Used to adjust the instruction for indexed
	 * register writes.
	 */
	unsigned int ins_start_offset;

	u32 chicken;
	int hw_dewake_scanline;
};

/**
 * DOC: DSB
 *
 * A DSB (Display State Buffer) is a queue of MMIO instructions in the memory
 * which can be offloaded to DSB HW in Display Controller. DSB HW is a DMA
 * engine that can be programmed to download the DSB from memory.
 * It allows driver to batch submit display HW programming. This helps to
 * reduce loading time and CPU activity, thereby making the context switch
 * faster. DSB Support added from Gen12 Intel graphics based platform.
 *
 * DSB's can access only the pipe, plane, and transcoder Data Island Packet
 * registers.
 *
 * DSB HW can support only register writes (both indexed and direct MMIO
 * writes). There are no registers reads possible with DSB HW engine.
 */

/*
 * DSB buffer parent interface calls are here instead of intel_parent.[ch]
 * because they're not used outside of intel_dsb.c.
 */
static u32 dsb_buffer_ggtt_offset(struct intel_dsb *dsb)
{
	struct intel_display *display = to_intel_display(dsb->crtc);

	return display->parent->dsb->ggtt_offset(dsb->dsb_buf);
}

static void dsb_buffer_write(struct intel_dsb *dsb, u32 idx, u32 val)
{
	struct intel_display *display = to_intel_display(dsb->crtc);

	display->parent->dsb->write(dsb->dsb_buf, idx, val);
}

static u32 dsb_buffer_read(struct intel_dsb *dsb, u32 idx)
{
	struct intel_display *display = to_intel_display(dsb->crtc);

	return display->parent->dsb->read(dsb->dsb_buf, idx);
}

static void dsb_buffer_fill(struct intel_dsb *dsb, u32 idx, u32 val, size_t size)
{
	struct intel_display *display = to_intel_display(dsb->crtc);

	display->parent->dsb->fill(dsb->dsb_buf, idx, val, size);
}

static struct intel_dsb_buffer *dsb_buffer_create(struct intel_display *display, size_t size)
{
	return display->parent->dsb->create(display->drm, size);
}

static void dsb_buffer_cleanup(struct intel_dsb *dsb)

Annotation

Implementation Notes