drivers/gpu/drm/i915/display/intel_dsi.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/i915/display/intel_dsi.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/i915/display/intel_dsi.h- Extension
.h- Size
- 4821 bytes
- Lines
- 178
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
drm/drm_crtc.hdrm/drm_mipi_dsi.hintel_display_types.h
Detected Declarations
struct intel_dsi_hoststruct ref_trackerstruct intel_dsistruct intel_dsi_hostfunction is_vid_modefunction is_cmd_modefunction intel_dsi_encoder_ports
Annotated Snippet
struct intel_dsi {
struct intel_encoder base;
struct intel_dsi_host *dsi_hosts[I915_MAX_PORTS];
struct ref_tracker *io_wakeref[I915_MAX_PORTS];
/* GPIO Desc for panel and backlight control */
struct gpio_desc *gpio_panel;
struct gpio_desc *gpio_backlight;
struct intel_connector *attached_connector;
/* bit mask of ports (vlv dsi) or phys (icl dsi) being driven */
union {
u16 ports; /* VLV DSI */
u16 phys; /* ICL DSI */
};
/* virtual channel */
int channel;
/* Video mode or command mode */
u16 operation_mode;
/* number of DSI lanes */
unsigned int lane_count;
/* i2c bus associated with the target device */
int i2c_bus_num;
/*
* video mode pixel format
*
* XXX: consolidate on .format in struct mipi_dsi_device.
*/
enum mipi_dsi_pixel_format pixel_format;
/* NON_BURST_SYNC_PULSE, NON_BURST_SYNC_EVENTS, or BURST_MODE */
int video_mode;
bool lp_clock_during_lpm;
bool blanking_pkt;
bool eot_pkt;
bool clock_stop;
u8 escape_clk_div;
u8 dual_link;
/* RGB or BGR */
bool bgr_enabled;
u8 pixel_overlap;
u32 bw_timer;
u32 dphy_reg;
/* data lanes dphy timing */
u32 dphy_data_lane_reg;
u32 video_frmt_cfg_bits;
u16 lp_byte_clk;
/* timeouts in byte clocks */
u16 hs_tx_timeout;
u16 lp_rx_timeout;
u16 turn_arnd_val;
u16 rst_timer_val;
u16 hs_to_lp_count;
u16 clk_lp_to_hs_count;
u16 clk_hs_to_lp_count;
u16 init_count;
u32 pclk;
u16 burst_mode_ratio;
/* all delays in ms */
u16 backlight_off_delay;
u16 backlight_on_delay;
u16 panel_on_delay;
u16 panel_off_delay;
u16 panel_pwr_cycle_delay;
ktime_t panel_power_off_time;
};
struct intel_dsi_host {
struct mipi_dsi_host base;
struct intel_dsi *intel_dsi;
enum port port;
/* our little hack */
struct mipi_dsi_device *device;
};
Annotation
- Immediate include surface: `drm/drm_crtc.h`, `drm/drm_mipi_dsi.h`, `intel_display_types.h`.
- Detected declarations: `struct intel_dsi_host`, `struct ref_tracker`, `struct intel_dsi`, `struct intel_dsi_host`, `function is_vid_mode`, `function is_cmd_mode`, `function intel_dsi_encoder_ports`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.