drivers/gpu/drm/i915/display/intel_flipq.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/i915/display/intel_flipq.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/i915/display/intel_flipq.c
Extension
.c
Size
13974 bytes
Lines
466
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: MIT
/*
 * Copyright © 2025 Intel Corporation
 */

#include <linux/pci.h>

#include <drm/drm_print.h>
#include <drm/intel/step.h>

#include "intel_crtc.h"
#include "intel_de.h"
#include "intel_display_core.h"
#include "intel_display_types.h"
#include "intel_display_utils.h"
#include "intel_display_wa.h"
#include "intel_dmc.h"
#include "intel_dmc_regs.h"
#include "intel_dsb.h"
#include "intel_flipq.h"
#include "intel_vblank.h"
#include "intel_vrr.h"

/**
 * DOC: DMC Flip Queue
 *
 * A flip queue is a ring buffer implemented by the pipe DMC firmware.
 * The driver inserts entries into the queues to be executed by the
 * pipe DMC at a specified presentation timestamp (PTS).
 *
 * Each pipe DMC provides several queues:
 *
 * - 1 general queue (two DSB buffers executed per entry)
 * - 3 plane queues (one DSB buffer executed per entry)
 * - 1 fast queue (deprecated)
 */

#define for_each_flipq(flipq_id) \
	for ((flipq_id) = INTEL_FLIPQ_PLANE_1; (flipq_id) < MAX_INTEL_FLIPQ; (flipq_id)++)

static int intel_flipq_offset(enum intel_flipq_id flipq_id)
{
	switch (flipq_id) {
	case INTEL_FLIPQ_PLANE_1:
		return 0x008;
	case INTEL_FLIPQ_PLANE_2:
		return 0x108;
	case INTEL_FLIPQ_PLANE_3:
		return 0x208;
	case INTEL_FLIPQ_GENERAL:
		return 0x308;
	case INTEL_FLIPQ_FAST:
		return 0x3c8;
	default:
		MISSING_CASE(flipq_id);
		return 0;
	}
}

static int intel_flipq_size_dw(enum intel_flipq_id flipq_id)
{
	switch (flipq_id) {
	case INTEL_FLIPQ_PLANE_1:
	case INTEL_FLIPQ_PLANE_2:
	case INTEL_FLIPQ_PLANE_3:
		return 64;
	case INTEL_FLIPQ_GENERAL:
	case INTEL_FLIPQ_FAST:
		return 48;
	default:
		MISSING_CASE(flipq_id);
		return 1;
	}
}

static int intel_flipq_elem_size_dw(enum intel_flipq_id flipq_id)
{
	switch (flipq_id) {
	case INTEL_FLIPQ_PLANE_1:
	case INTEL_FLIPQ_PLANE_2:
	case INTEL_FLIPQ_PLANE_3:
		return 4;
	case INTEL_FLIPQ_GENERAL:
	case INTEL_FLIPQ_FAST:
		return 6;
	default:
		MISSING_CASE(flipq_id);
		return 1;
	}
}

Annotation

Implementation Notes