drivers/gpu/drm/i915/display/intel_initial_plane.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/i915/display/intel_initial_plane.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/i915/display/intel_initial_plane.c
Extension
.c
Size
6922 bytes
Lines
241
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct intel_initial_plane_configs {
	struct intel_initial_plane_config config[I915_MAX_PIPES];
};

void intel_initial_plane_vblank_wait(struct intel_crtc *crtc)
{
	struct intel_display *display = to_intel_display(crtc);
	u32 start_ts, end_ts;
	int ret;

	/* xe doesn't have interrupts enabled this early */
	if (intel_parent_irq_enabled(display)) {
		intel_crtc_wait_for_next_vblank(crtc);
		return;
	}

	start_ts = intel_de_read(display, PIPE_FRMTMSTMP(crtc->pipe));

	ret = poll_timeout_us(end_ts = intel_de_read(display, PIPE_FRMTMSTMP(crtc->pipe)),
			      end_ts != start_ts, 1000, 1000 * 1000, false);
	if (ret)
		drm_warn(display->drm, "[CRTC:%d:%s] early vblank wait timed out\n",
			 crtc->base.base.id, crtc->base.name);
}

static const struct intel_plane_state *
intel_reuse_initial_plane_obj(struct intel_crtc *this,
			      const struct intel_initial_plane_configs *all_plane_configs)
{
	struct intel_display *display = to_intel_display(this);
	struct intel_crtc *crtc;

	for_each_intel_crtc(display, crtc) {
		struct intel_plane *plane =
			to_intel_plane(crtc->base.primary);
		const struct intel_plane_state *plane_state =
			to_intel_plane_state(plane->base.state);
		const struct intel_crtc_state *crtc_state =
			to_intel_crtc_state(crtc->base.state);

		if (!crtc_state->hw.active)
			continue;

		if (!plane_state->ggtt_vma)
			continue;

		if (all_plane_configs->config[this->pipe].base ==
		    all_plane_configs->config[crtc->pipe].base)
			return plane_state;
	}

	return NULL;
}

static struct drm_gem_object *
intel_alloc_initial_plane_obj(struct intel_display *display,
			      struct intel_initial_plane_config *plane_config)
{
	struct drm_framebuffer *fb = plane_config->fb;

	switch (fb->modifier) {
	case DRM_FORMAT_MOD_LINEAR:
		break;
	case I915_FORMAT_MOD_X_TILED:
	case I915_FORMAT_MOD_Y_TILED:
		/* fenced region needed for linear CPU access to tiled FB */
		if (intel_parent_has_fenced_regions(display))
			break;
		fallthrough;
	default:
		drm_dbg_kms(display->drm, "Unsupported modifier for initial FB: 0x%llx\n",
			    fb->modifier);
		return NULL;
	}

	/*
	 * Would need to preserve the DPT, its GGTT
	 * mapping, and the actual FB memory.
	 */
	if (intel_fb_modifier_uses_dpt(display, fb->modifier)) {
		drm_dbg_kms(display->drm, "DPT not supported for initial FB\n");
		return NULL;
	}

	/*
	 * Would need to preserve the 270 degree rotated
	 * GGTT mapping used by the display hardware.
	 */
	if (drm_rotation_90_or_270(plane_config->rotation)) {
		drm_dbg_kms(display->drm, "90/270 degree rotation not supported for initial FB\n");

Annotation

Implementation Notes