drivers/gpu/drm/i915/display/intel_lt_phy.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/i915/display/intel_lt_phy.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/i915/display/intel_lt_phy.h- Extension
.h- Size
- 1980 bytes
- Lines
- 54
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/types.h
Detected Declarations
struct drm_printerstruct intel_atomic_statestruct intel_displaystruct intel_dpllstruct intel_dpll_hw_statestruct intel_encoderstruct intel_crtc_statestruct intel_crtcstruct intel_lt_phy_pll_state
Annotated Snippet
#ifndef __INTEL_LT_PHY_H__
#define __INTEL_LT_PHY_H__
#include <linux/types.h>
struct drm_printer;
struct intel_atomic_state;
struct intel_display;
struct intel_dpll;
struct intel_dpll_hw_state;
struct intel_encoder;
struct intel_crtc_state;
struct intel_crtc;
struct intel_lt_phy_pll_state;
void intel_lt_phy_pll_enable(struct intel_encoder *encoder,
struct intel_dpll *pll,
const struct intel_dpll_hw_state *dpll_hw_state);
void intel_lt_phy_pll_disable(struct intel_encoder *encoder);
int
intel_lt_phy_pll_calc_state(struct intel_crtc_state *crtc_state,
struct intel_encoder *encoder,
struct intel_dpll_hw_state *hw_state);
void intel_lt_phy_tbt_pll_calc_state(struct intel_dpll_hw_state *hw_state);
int intel_lt_phy_calc_port_clock(struct intel_display *display,
const struct intel_lt_phy_pll_state *lt_state);
void intel_lt_phy_set_signal_levels(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state);
void intel_lt_phy_dump_hw_state(struct drm_printer *p,
const struct intel_lt_phy_pll_state *hw_state);
bool
intel_lt_phy_pll_compare_hw_state(const struct intel_lt_phy_pll_state *a,
const struct intel_lt_phy_pll_state *b);
bool intel_lt_phy_tbt_pll_readout_hw_state(struct intel_display *display,
struct intel_dpll *pll,
struct intel_dpll_hw_state *hw_state);
bool intel_lt_phy_pll_readout_hw_state(struct intel_encoder *encoder,
struct intel_lt_phy_pll_state *pll_state);
int
intel_lt_phy_calculate_hdmi_state(struct intel_lt_phy_pll_state *lt_state,
u32 frequency_khz);
void intel_xe3plpd_pll_enable(struct intel_encoder *encoder,
struct intel_dpll *pll,
const struct intel_dpll_hw_state *dpll_hw_state);
void intel_xe3plpd_pll_disable(struct intel_encoder *encoder);
void intel_lt_phy_verify_plls(struct intel_display *display);
#endif /* __INTEL_LT_PHY_H__ */
Annotation
- Immediate include surface: `linux/types.h`.
- Detected declarations: `struct drm_printer`, `struct intel_atomic_state`, `struct intel_display`, `struct intel_dpll`, `struct intel_dpll_hw_state`, `struct intel_encoder`, `struct intel_crtc_state`, `struct intel_crtc`, `struct intel_lt_phy_pll_state`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.