drivers/gpu/drm/i915/display/intel_modeset_setup.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/i915/display/intel_modeset_setup.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/i915/display/intel_modeset_setup.c- Extension
.c- Size
- 30177 bytes
- Lines
- 1016
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
drm/drm_atomic_state_helper.hdrm/drm_atomic_uapi.hdrm/drm_print.hdrm/drm_vblank.hi9xx_wm.hintel_atomic.hintel_bw.hintel_cmtg.hintel_color.hintel_crtc.hintel_crtc_state_dump.hintel_dbuf_bw.hintel_ddi.hintel_de.hintel_display.hintel_display_power.hintel_display_regs.hintel_display_types.hintel_display_wa.hintel_dmc.hintel_fifo_underrun.hintel_modeset_setup.hintel_pch_display.hintel_pmdemand.hintel_tc.hintel_vblank.hintel_vga.hintel_wm.hskl_watermark.h
Detected Declarations
function intel_crtc_disable_noatomic_beginfunction for_each_intel_plane_on_crtcfunction BITfunction set_encoder_for_connectorfunction reset_encoder_connector_statefunction reset_crtc_encoder_statefunction for_each_encoder_on_crtcfunction intel_crtc_disable_noatomic_completefunction get_transcoder_pipesfunction for_each_intel_crtcfunction get_portsync_pipesfunction get_joiner_secondary_pipesfunction for_each_intel_crtc_in_pipe_maskfunction intel_crtc_disable_noatomicfunction intel_modeset_update_connector_atomic_statefunction intel_crtc_copy_hw_to_uapi_statefunction intel_sanitize_plane_mappingfunction for_each_intel_crtcfunction intel_crtc_has_encodersfunction intel_crtc_needs_link_resetfunction for_each_encoder_on_crtcfunction intel_sanitize_fifo_underrun_reportingfunction intel_sanitize_crtcfunction for_each_intel_plane_on_crtcfunction intel_sanitize_all_crtcsfunction for_each_intel_crtcfunction for_each_intel_crtcfunction has_bogus_dpll_configfunction intel_sanitize_encoderfunction readout_plane_statefunction for_each_intel_planefunction for_each_intel_crtcfunction intel_modeset_readout_hw_statefunction for_each_intel_crtcfunction for_each_intel_encoderfunction for_each_intel_crtc_in_pipe_maskfunction for_each_intel_crtcfunction for_each_intel_plane_on_crtcfunction get_encoder_power_domainsfunction for_each_intel_encoderfunction intel_early_display_wasfunction intel_modeset_setup_hw_statefunction intel_sanitize_plane_mappingfunction for_each_intel_crtc
Annotated Snippet
intel_crtc_joiner_secondary_pipes(crtc_state)) {
struct intel_crtc_state *temp_crtc_state =
intel_atomic_get_crtc_state(state, temp_crtc);
int ret;
ret = drm_atomic_add_affected_connectors(state, &temp_crtc->base);
drm_WARN_ON(display->drm, IS_ERR(temp_crtc_state) || ret);
}
display->modeset.funcs->crtc_disable(to_intel_atomic_state(state), crtc);
drm_atomic_commit_put(state);
drm_dbg_kms(display->drm,
"[CRTC:%d:%s] hw state adjusted, was enabled, now disabled\n",
crtc->base.base.id, crtc->base.name);
crtc->active = false;
crtc->base.enabled = false;
if (crtc_state->intel_dpll)
intel_dpll_crtc_put(crtc,
crtc_state->intel_dpll,
&crtc_state->intel_dpll->state);
}
static void set_encoder_for_connector(struct intel_connector *connector,
struct intel_encoder *encoder)
{
struct drm_connector_state *conn_state = connector->base.state;
if (conn_state->crtc)
drm_connector_put(&connector->base);
if (encoder) {
conn_state->best_encoder = &encoder->base;
conn_state->crtc = encoder->base.crtc;
drm_connector_get(&connector->base);
} else {
conn_state->best_encoder = NULL;
conn_state->crtc = NULL;
}
}
static void reset_encoder_connector_state(struct intel_encoder *encoder)
{
struct intel_display *display = to_intel_display(encoder);
struct intel_pmdemand_state *pmdemand_state =
to_intel_pmdemand_state(display->pmdemand.obj.state);
struct intel_connector *connector;
struct drm_connector_list_iter conn_iter;
drm_connector_list_iter_begin(display->drm, &conn_iter);
for_each_intel_connector_iter(connector, &conn_iter) {
if (connector->base.encoder != &encoder->base)
continue;
/* Clear the corresponding bit in pmdemand active phys mask */
intel_pmdemand_update_phys_mask(display, encoder,
pmdemand_state, false);
set_encoder_for_connector(connector, NULL);
connector->base.dpms = DRM_MODE_DPMS_OFF;
connector->base.encoder = NULL;
}
drm_connector_list_iter_end(&conn_iter);
}
static void reset_crtc_encoder_state(struct intel_crtc *crtc)
{
struct intel_display *display = to_intel_display(crtc);
struct intel_encoder *encoder;
for_each_encoder_on_crtc(display->drm, &crtc->base, encoder) {
reset_encoder_connector_state(encoder);
encoder->base.crtc = NULL;
}
}
static void intel_crtc_disable_noatomic_complete(struct intel_crtc *crtc)
{
struct intel_display *display = to_intel_display(crtc);
struct intel_pmdemand_state *pmdemand_state =
to_intel_pmdemand_state(display->pmdemand.obj.state);
struct intel_crtc_state *crtc_state =
to_intel_crtc_state(crtc->base.state);
enum pipe pipe = crtc->pipe;
Annotation
- Immediate include surface: `drm/drm_atomic_state_helper.h`, `drm/drm_atomic_uapi.h`, `drm/drm_print.h`, `drm/drm_vblank.h`, `i9xx_wm.h`, `intel_atomic.h`, `intel_bw.h`, `intel_cmtg.h`.
- Detected declarations: `function intel_crtc_disable_noatomic_begin`, `function for_each_intel_plane_on_crtc`, `function BIT`, `function set_encoder_for_connector`, `function reset_encoder_connector_state`, `function reset_crtc_encoder_state`, `function for_each_encoder_on_crtc`, `function intel_crtc_disable_noatomic_complete`, `function get_transcoder_pipes`, `function for_each_intel_crtc`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.