drivers/gpu/drm/i915/display/intel_plane.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/i915/display/intel_plane.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/i915/display/intel_plane.c- Extension
.c- Size
- 60156 bytes
- Lines
- 1927
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/dma-fence-chain.hlinux/dma-resv.hlinux/iosys-map.hdrm/drm_atomic_helper.hdrm/drm_blend.hdrm/drm_cache.hdrm/drm_damage_helper.hdrm/drm_fourcc.hdrm/drm_gem.hdrm/drm_gem_atomic_helper.hdrm/drm_panic.hdrm/drm_print.hdrm/intel/display_parent_interface.hi9xx_plane_regs.hintel_cdclk.hintel_cursor.hintel_colorop.hintel_display_rps.hintel_display_trace.hintel_display_types.hintel_fb.hintel_fbdev.hintel_parent.hintel_plane.hintel_psr.hskl_scaler.hskl_universal_plane.hskl_watermark.h
Detected Declarations
function filesfunction intel_plane_freefunction planesfunction statefunction statefunction intel_plane_needs_low_addressfunction intel_plane_needs_physicalfunction intel_plane_needs_fencefunction intel_plane_can_async_flipfunction intel_plane_format_mod_supported_asyncfunction intel_adjusted_ratefunction intel_plane_pixel_ratefunction intel_plane_data_ratefunction intel_plane_relative_data_ratefunction intel_plane_calc_min_cdclkfunction intel_plane_clear_hw_statefunction intel_plane_copy_uapi_plane_damagefunction intel_plane_colorop_replace_blobfunction intel_plane_color_copy_uapi_to_hw_statefunction intel_plane_copy_uapi_to_hw_statefunction intel_plane_copy_hw_statefunction unlink_nv12_planefunction intel_plane_set_invisiblefunction intel_plane_is_scaledfunction intel_plane_do_async_flipfunction i9xx_must_disable_cxsrfunction ilk_must_disable_cxsrfunction intel_plane_atomic_calc_changesfunction intel_plane_atomic_check_with_statefunction intel_crtc_get_planefunction for_each_intel_plane_on_crtcfunction plane_atomic_checkfunction skl_next_plane_to_commitfunction for_each_new_intel_plane_in_statefunction intel_plane_update_noarmfunction intel_plane_async_flipfunction intel_plane_update_armfunction intel_plane_disable_armfunction intel_crtc_planes_update_noarmfunction skl_crtc_planes_update_armfunction i9xx_crtc_planes_update_armfunction for_each_new_intel_plane_in_statefunction intel_crtc_planes_update_armfunction intel_plane_check_clippingfunction intel_plane_check_src_coordinatesfunction intel_format_info_is_yuv_semiplanarfunction intel_plane_fb_min_alignmentfunction intel_plane_fb_min_phys_alignment
Annotated Snippet
for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) {
if (new_colorop_state->colorop == iter_colorop) {
blob = new_colorop_state->bypass ? NULL : new_colorop_state->data;
intel_colorop = to_intel_colorop(colorop);
changed |= intel_plane_colorop_replace_blob(plane_state,
intel_colorop,
blob);
}
}
iter_colorop = iter_colorop->next;
}
if (new_crtc_state && changed)
new_crtc_state->plane_color_changed = true;
}
void intel_plane_copy_uapi_to_hw_state(struct intel_plane_state *plane_state,
const struct intel_plane_state *from_plane_state,
struct intel_crtc *crtc)
{
intel_plane_clear_hw_state(plane_state);
/*
* For the joiner secondary uapi.crtc will point at
* the primary crtc. So we explicitly assign the right
* secondary crtc to hw.crtc. uapi.crtc!=NULL simply
* indicates the plane is logically enabled on the uapi level.
*/
plane_state->hw.crtc = from_plane_state->uapi.crtc ? &crtc->base : NULL;
plane_state->hw.fb = from_plane_state->uapi.fb;
if (plane_state->hw.fb)
drm_framebuffer_get(plane_state->hw.fb);
plane_state->hw.alpha = from_plane_state->uapi.alpha;
plane_state->hw.pixel_blend_mode =
from_plane_state->uapi.pixel_blend_mode;
plane_state->hw.rotation = from_plane_state->uapi.rotation;
plane_state->hw.color_encoding = from_plane_state->uapi.color_encoding;
plane_state->hw.color_range = from_plane_state->uapi.color_range;
plane_state->hw.scaling_filter = from_plane_state->uapi.scaling_filter;
plane_state->uapi.src = drm_plane_state_src(&from_plane_state->uapi);
plane_state->uapi.dst = drm_plane_state_dest(&from_plane_state->uapi);
intel_plane_color_copy_uapi_to_hw_state(plane_state, from_plane_state, crtc);
}
void intel_plane_copy_hw_state(struct intel_plane_state *plane_state,
const struct intel_plane_state *from_plane_state)
{
intel_plane_clear_hw_state(plane_state);
memcpy(&plane_state->hw, &from_plane_state->hw,
sizeof(plane_state->hw));
if (plane_state->hw.fb)
drm_framebuffer_get(plane_state->hw.fb);
}
static void unlink_nv12_plane(struct intel_crtc_state *crtc_state,
struct intel_plane_state *plane_state)
{
struct intel_display *display = to_intel_display(plane_state);
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
if (!plane_state->planar_linked_plane)
return;
plane_state->planar_linked_plane = NULL;
if (!plane_state->is_y_plane)
return;
drm_WARN_ON(display->drm, plane_state->uapi.visible);
plane_state->is_y_plane = false;
crtc_state->enabled_planes &= ~BIT(plane->id);
crtc_state->active_planes &= ~BIT(plane->id);
crtc_state->update_planes |= BIT(plane->id);
crtc_state->data_rate[plane->id] = 0;
crtc_state->rel_data_rate[plane->id] = 0;
}
void intel_plane_set_invisible(struct intel_crtc_state *crtc_state,
struct intel_plane_state *plane_state)
{
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
Annotation
- Immediate include surface: `linux/dma-fence-chain.h`, `linux/dma-resv.h`, `linux/iosys-map.h`, `drm/drm_atomic_helper.h`, `drm/drm_blend.h`, `drm/drm_cache.h`, `drm/drm_damage_helper.h`, `drm/drm_fourcc.h`.
- Detected declarations: `function files`, `function intel_plane_free`, `function planes`, `function state`, `function state`, `function intel_plane_needs_low_address`, `function intel_plane_needs_physical`, `function intel_plane_needs_fence`, `function intel_plane_can_async_flip`, `function intel_plane_format_mod_supported_async`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.