drivers/gpu/drm/i915/display/intel_wm_types.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/i915/display/intel_wm_types.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/i915/display/intel_wm_types.h- Extension
.h- Size
- 1327 bytes
- Lines
- 77
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/types.hintel_display_limits.h
Detected Declarations
struct ilk_wm_valuesstruct g4x_pipe_wmstruct g4x_sr_wmstruct vlv_wm_ddl_valuesstruct vlv_wm_valuesstruct g4x_wm_valuesstruct skl_ddb_entryenum intel_ddb_partitioningfunction skl_ddb_entry_sizefunction skl_ddb_entry_equal
Annotated Snippet
struct ilk_wm_values {
u32 wm_pipe[3];
u32 wm_lp[3];
u32 wm_lp_spr[3];
bool enable_fbc_wm;
enum intel_ddb_partitioning partitioning;
};
struct g4x_pipe_wm {
u16 plane[I915_MAX_PLANES];
u16 fbc;
};
struct g4x_sr_wm {
u16 plane;
u16 cursor;
u16 fbc;
};
struct vlv_wm_ddl_values {
u8 plane[I915_MAX_PLANES];
};
struct vlv_wm_values {
struct g4x_pipe_wm pipe[3];
struct g4x_sr_wm sr;
struct vlv_wm_ddl_values ddl[3];
u8 level;
bool cxsr;
};
struct g4x_wm_values {
struct g4x_pipe_wm pipe[2];
struct g4x_sr_wm sr;
struct g4x_sr_wm hpll;
bool cxsr;
bool hpll_en;
bool fbc_en;
};
struct skl_ddb_entry {
u16 start, end; /* in number of blocks, 'end' is exclusive */
};
static inline u16 skl_ddb_entry_size(const struct skl_ddb_entry *entry)
{
return entry->end - entry->start;
}
static inline bool skl_ddb_entry_equal(const struct skl_ddb_entry *e1,
const struct skl_ddb_entry *e2)
{
if (e1->start == e2->start && e1->end == e2->end)
return true;
return false;
}
#endif /* __INTEL_WM_TYPES_H__ */
Annotation
- Immediate include surface: `linux/types.h`, `intel_display_limits.h`.
- Detected declarations: `struct ilk_wm_values`, `struct g4x_pipe_wm`, `struct g4x_sr_wm`, `struct vlv_wm_ddl_values`, `struct vlv_wm_values`, `struct g4x_wm_values`, `struct skl_ddb_entry`, `enum intel_ddb_partitioning`, `function skl_ddb_entry_size`, `function skl_ddb_entry_equal`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.