drivers/gpu/drm/i915/gem/i915_gem_context_types.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/i915/gem/i915_gem_context_types.h- Extension
.h- Size
- 14160 bytes
- Lines
- 423
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/atomic.hlinux/list.hlinux/llist.hlinux/kref.hlinux/mutex.hlinux/radix-tree.hlinux/rbtree.hlinux/rcupdate.hlinux/types.hgt/intel_context_types.hi915_scheduler.hi915_sw_fence.h
Detected Declarations
struct pidstruct drm_i915_privatestruct drm_i915_file_privatestruct i915_address_spacestruct intel_timelinestruct intel_ringstruct i915_gem_enginesstruct i915_gem_engines_iterstruct i915_gem_proto_enginestruct i915_gem_proto_contextstruct i915_gem_contextenum i915_gem_engine_type
Annotated Snippet
struct i915_gem_engines {
union {
/** @link: Link in i915_gem_context::stale::engines */
struct list_head link;
/** @rcu: RCU to use when freeing */
struct rcu_head rcu;
};
/** @fence: Fence used for delayed destruction of engines */
struct i915_sw_fence fence;
/** @ctx: i915_gem_context backpointer */
struct i915_gem_context *ctx;
/** @num_engines: Number of engines in this set */
unsigned int num_engines;
/** @engines: Array of engines */
struct intel_context *engines[];
};
/**
* struct i915_gem_engines_iter - Iterator for an i915_gem_engines set
*/
struct i915_gem_engines_iter {
/** @idx: Index into i915_gem_engines::engines */
unsigned int idx;
/** @engines: Engine set being iterated */
const struct i915_gem_engines *engines;
};
/**
* enum i915_gem_engine_type - Describes the type of an i915_gem_proto_engine
*/
enum i915_gem_engine_type {
/** @I915_GEM_ENGINE_TYPE_INVALID: An invalid engine */
I915_GEM_ENGINE_TYPE_INVALID = 0,
/** @I915_GEM_ENGINE_TYPE_PHYSICAL: A single physical engine */
I915_GEM_ENGINE_TYPE_PHYSICAL,
/** @I915_GEM_ENGINE_TYPE_BALANCED: A load-balanced engine set */
I915_GEM_ENGINE_TYPE_BALANCED,
/** @I915_GEM_ENGINE_TYPE_PARALLEL: A parallel engine set */
I915_GEM_ENGINE_TYPE_PARALLEL,
};
/**
* struct i915_gem_proto_engine - prototype engine
*
* This struct describes an engine that a context may contain. Engines
* have four types:
*
* - I915_GEM_ENGINE_TYPE_INVALID: Invalid engines can be created but they
* show up as a NULL in i915_gem_engines::engines[i] and any attempt to
* use them by the user results in -EINVAL. They are also useful during
* proto-context construction because the client may create invalid
* engines and then set them up later as virtual engines.
*
* - I915_GEM_ENGINE_TYPE_PHYSICAL: A single physical engine, described by
* i915_gem_proto_engine::engine.
*
* - I915_GEM_ENGINE_TYPE_BALANCED: A load-balanced engine set, described
* i915_gem_proto_engine::num_siblings and i915_gem_proto_engine::siblings.
*
* - I915_GEM_ENGINE_TYPE_PARALLEL: A parallel submission engine set, described
* i915_gem_proto_engine::width, i915_gem_proto_engine::num_siblings, and
* i915_gem_proto_engine::siblings.
*/
struct i915_gem_proto_engine {
/** @type: Type of this engine */
enum i915_gem_engine_type type;
/** @engine: Engine, for physical */
struct intel_engine_cs *engine;
/** @num_siblings: Number of balanced or parallel siblings */
unsigned int num_siblings;
/** @width: Width of each sibling */
unsigned int width;
/** @siblings: Balanced siblings or num_siblings * width for parallel */
struct intel_engine_cs **siblings;
/** @sseu: Client-set SSEU parameters */
struct intel_sseu sseu;
Annotation
- Immediate include surface: `linux/atomic.h`, `linux/list.h`, `linux/llist.h`, `linux/kref.h`, `linux/mutex.h`, `linux/radix-tree.h`, `linux/rbtree.h`, `linux/rcupdate.h`.
- Detected declarations: `struct pid`, `struct drm_i915_private`, `struct drm_i915_file_private`, `struct i915_address_space`, `struct intel_timeline`, `struct intel_ring`, `struct i915_gem_engines`, `struct i915_gem_engines_iter`, `struct i915_gem_proto_engine`, `struct i915_gem_proto_context`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.