drivers/gpu/drm/i915/gem/selftests/igt_gem_utils.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/i915/gem/selftests/igt_gem_utils.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/i915/gem/selftests/igt_gem_utils.c- Extension
.c- Size
- 3358 bytes
- Lines
- 158
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
igt_gem_utils.hgem/i915_gem_context.hgem/i915_gem_internal.hgem/i915_gem_pm.hgt/intel_context.hgt/intel_gpu_commands.hgt/intel_gt.hi915_vma.hi915_drv.hi915_request.h
Detected Declarations
function igt_request_allocfunction igt_emit_store_dwfunction igt_gpu_fill_dw
Annotated Snippet
if (ver >= 8) {
*cmd++ = MI_STORE_DWORD_IMM_GEN4;
*cmd++ = lower_32_bits(offset);
*cmd++ = upper_32_bits(offset);
*cmd++ = val;
} else if (ver >= 4) {
*cmd++ = MI_STORE_DWORD_IMM_GEN4 |
(ver < 6 ? MI_USE_GGTT : 0);
*cmd++ = 0;
*cmd++ = offset;
*cmd++ = val;
} else {
*cmd++ = MI_STORE_DWORD_IMM | MI_MEM_VIRTUAL;
*cmd++ = offset;
*cmd++ = val;
}
offset += PAGE_SIZE;
}
*cmd = MI_BATCH_BUFFER_END;
i915_gem_object_flush_map(obj);
i915_gem_object_unpin_map(obj);
intel_gt_chipset_flush(vma->vm->gt);
vma = i915_vma_instance(obj, vma->vm, NULL);
if (IS_ERR(vma)) {
err = PTR_ERR(vma);
goto err;
}
err = i915_vma_pin(vma, 0, 0, PIN_USER);
if (err)
goto err;
return vma;
err:
i915_gem_object_put(obj);
return ERR_PTR(err);
}
int igt_gpu_fill_dw(struct intel_context *ce,
struct i915_vma *vma, u64 offset,
unsigned long count, u32 val)
{
struct i915_request *rq;
struct i915_vma *batch;
unsigned int flags;
int err;
GEM_BUG_ON(!intel_engine_can_store_dword(ce->engine));
GEM_BUG_ON(!i915_vma_is_pinned(vma));
batch = igt_emit_store_dw(vma, offset, count, val);
if (IS_ERR(batch))
return PTR_ERR(batch);
rq = intel_context_create_request(ce);
if (IS_ERR(rq)) {
err = PTR_ERR(rq);
goto err_batch;
}
err = igt_vma_move_to_active_unlocked(batch, rq, 0);
if (err)
goto skip_request;
err = igt_vma_move_to_active_unlocked(vma, rq, EXEC_OBJECT_WRITE);
if (err)
goto skip_request;
flags = 0;
if (GRAPHICS_VER(ce->vm->i915) <= 5)
flags |= I915_DISPATCH_SECURE;
err = rq->engine->emit_bb_start(rq,
i915_vma_offset(batch),
i915_vma_size(batch),
flags);
skip_request:
if (err)
i915_request_set_error_once(rq, err);
i915_request_add(rq);
err_batch:
i915_vma_unpin_and_release(&batch, 0);
return err;
}
Annotation
- Immediate include surface: `igt_gem_utils.h`, `gem/i915_gem_context.h`, `gem/i915_gem_internal.h`, `gem/i915_gem_pm.h`, `gt/intel_context.h`, `gt/intel_gpu_commands.h`, `gt/intel_gt.h`, `i915_vma.h`.
- Detected declarations: `function igt_request_alloc`, `function igt_emit_store_dw`, `function igt_gpu_fill_dw`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.