drivers/gpu/drm/i915/gt/gen6_ppgtt.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/i915/gt/gen6_ppgtt.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/i915/gt/gen6_ppgtt.c- Extension
.c- Size
- 11811 bytes
- Lines
- 470
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/log2.hgem/i915_gem_internal.hgen6_ppgtt.hi915_scatterlist.hi915_trace.hi915_vgpu.hintel_gt_regs.hintel_engine_regs.hintel_gt.h
Detected Declarations
function gen6_write_pdefunction gen7_ppgtt_enablefunction gen6_ppgtt_enablefunction gen6_ppgtt_clear_rangefunction gen6_ppgtt_insert_entriesfunction gen6_flush_pdfunction gen6_alloc_va_rangefunction gen6_ppgtt_init_scratchfunction gen6_ppgtt_free_pdfunction gen6_ppgtt_cleanupfunction pd_vma_bindfunction pd_vma_unbindfunction gen6_ppgtt_pinfunction pd_dummy_obj_get_pagesfunction pd_dummy_obj_put_pagesfunction gen6_alloc_top_pdfunction gen6_ppgtt_unpin
Annotated Snippet
if (iter.dma == iter.max) {
iter.sg = __sg_next(iter.sg);
if (!iter.sg || sg_dma_len(iter.sg) == 0)
break;
iter.dma = sg_dma_address(iter.sg);
iter.max = iter.dma + sg_dma_len(iter.sg);
}
if (++act_pte == GEN6_PTES) {
vaddr = px_vaddr(i915_pt_entry(pd, ++act_pt));
act_pte = 0;
}
} while (1);
vma_res->page_sizes_gtt = I915_GTT_PAGE_SIZE;
}
static void gen6_flush_pd(struct gen6_ppgtt *ppgtt, u64 start, u64 end)
{
struct i915_page_directory * const pd = ppgtt->base.pd;
struct i915_page_table *pt;
unsigned int pde;
start = round_down(start, SZ_64K);
end = round_up(end, SZ_64K) - start;
mutex_lock(&ppgtt->flush);
gen6_for_each_pde(pt, pd, start, end, pde)
gen6_write_pde(ppgtt, pde, pt);
mb();
ioread32(ppgtt->pd_addr + pde - 1);
gen6_ggtt_invalidate(ppgtt->base.vm.gt->ggtt);
mb();
mutex_unlock(&ppgtt->flush);
}
static void gen6_alloc_va_range(struct i915_address_space *vm,
struct i915_vm_pt_stash *stash,
u64 start, u64 length)
{
struct gen6_ppgtt *ppgtt = to_gen6_ppgtt(i915_vm_to_ppgtt(vm));
struct i915_page_directory * const pd = ppgtt->base.pd;
struct i915_page_table *pt;
bool flush = false;
u64 from = start;
unsigned int pde;
spin_lock(&pd->lock);
gen6_for_each_pde(pt, pd, start, length, pde) {
const unsigned int count = gen6_pte_count(start, length);
if (!pt) {
spin_unlock(&pd->lock);
pt = stash->pt[0];
__i915_gem_object_pin_pages(pt->base);
fill32_px(pt, vm->scratch[0]->encode);
spin_lock(&pd->lock);
if (!pd->entry[pde]) {
stash->pt[0] = pt->stash;
atomic_set(&pt->used, 0);
pd->entry[pde] = pt;
} else {
pt = pd->entry[pde];
}
flush = true;
}
atomic_add(count, &pt->used);
}
spin_unlock(&pd->lock);
if (flush && i915_vma_is_bound(ppgtt->vma, I915_VMA_GLOBAL_BIND)) {
intel_wakeref_t wakeref;
with_intel_runtime_pm(&vm->i915->runtime_pm, wakeref)
gen6_flush_pd(ppgtt, from, start);
}
}
static int gen6_ppgtt_init_scratch(struct gen6_ppgtt *ppgtt)
{
struct i915_address_space * const vm = &ppgtt->base.vm;
Annotation
- Immediate include surface: `linux/log2.h`, `gem/i915_gem_internal.h`, `gen6_ppgtt.h`, `i915_scatterlist.h`, `i915_trace.h`, `i915_vgpu.h`, `intel_gt_regs.h`, `intel_engine_regs.h`.
- Detected declarations: `function gen6_write_pde`, `function gen7_ppgtt_enable`, `function gen6_ppgtt_enable`, `function gen6_ppgtt_clear_range`, `function gen6_ppgtt_insert_entries`, `function gen6_flush_pd`, `function gen6_alloc_va_range`, `function gen6_ppgtt_init_scratch`, `function gen6_ppgtt_free_pd`, `function gen6_ppgtt_cleanup`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.