drivers/gpu/drm/i915/gt/gen7_renderclear.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/i915/gt/gen7_renderclear.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/i915/gt/gen7_renderclear.c
Extension
.c
Size
10746 bytes
Lines
455
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct cb_kernel {
	const void *data;
	u32 size;
};

#define CB_KERNEL(name) { .data = (name), .size = sizeof(name) }

#include "ivb_clear_kernel.c"
static const struct cb_kernel cb_kernel_ivb = CB_KERNEL(ivb_clear_kernel);

#include "hsw_clear_kernel.c"
static const struct cb_kernel cb_kernel_hsw = CB_KERNEL(hsw_clear_kernel);

struct batch_chunk {
	struct i915_vma *vma;
	u32 offset;
	u32 *start;
	u32 *end;
	u32 max_items;
};

struct batch_vals {
	u32 max_threads;
	u32 state_start;
	u32 surface_start;
	u32 surface_height;
	u32 surface_width;
	u32 size;
};

static int num_primitives(const struct batch_vals *bv)
{
	/*
	 * We need to saturate the GPU with work in order to dispatch
	 * a shader on every HW thread, and clear the thread-local registers.
	 * In short, we have to dispatch work faster than the shaders can
	 * run in order to fill the EU and occupy each HW thread.
	 */
	return bv->max_threads;
}

static void
batch_get_defaults(struct drm_i915_private *i915, struct batch_vals *bv)
{
	if (IS_HASWELL(i915)) {
		switch (INTEL_INFO(i915)->gt) {
		default:
		case 1:
			bv->max_threads = 70;
			break;
		case 2:
			bv->max_threads = 140;
			break;
		case 3:
			bv->max_threads = 280;
			break;
		}
		bv->surface_height = 16 * 16;
		bv->surface_width = 32 * 2 * 16;
	} else {
		switch (INTEL_INFO(i915)->gt) {
		default:
		case 1: /* including vlv */
			bv->max_threads = 36;
			break;
		case 2:
			bv->max_threads = 128;
			break;
		}
		bv->surface_height = 16 * 8;
		bv->surface_width = 32 * 16;
	}
	bv->state_start = round_up(SZ_1K + num_primitives(bv) * 64, SZ_4K);
	bv->surface_start = bv->state_start + SZ_4K;
	bv->size = bv->surface_start + bv->surface_height * bv->surface_width;
}

static void batch_init(struct batch_chunk *bc,
		       struct i915_vma *vma,
		       u32 *start, u32 offset, u32 max_bytes)
{
	bc->vma = vma;
	bc->offset = offset;
	bc->start = start + bc->offset / sizeof(*bc->start);
	bc->end = bc->start;
	bc->max_items = max_bytes / sizeof(*bc->start);
}

static u32 batch_offset(const struct batch_chunk *bc, u32 *cs)
{

Annotation

Implementation Notes