drivers/gpu/drm/i915/gt/selftest_rc6.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/i915/gt/selftest_rc6.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/i915/gt/selftest_rc6.c
Extension
.c
Size
6711 bytes
Lines
286
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

if (!rc0_power) {
			if (rc0_freq)
				pr_debug("No power measured while in RC0! GPU Freq: %uMHz in RC0\n",
					 rc0_freq);
			else
				pr_err("No power and freq measured while in RC0\n");
			err = -EINVAL;
			goto out_unlock;
		}
	}

	/* Manually enter RC6 */
	intel_rc6_park(rc6);

	res[0] = rc6_residency(rc6);
	intel_uncore_forcewake_flush(rc6_to_uncore(rc6), FORCEWAKE_ALL);
	dt = ktime_get();
	rc6_sample_energy[0] = librapl_energy_uJ();
	msleep(sleep_time);
	rc6_freq = intel_rps_read_actual_frequency_fw(rps);
	rc6_sample_energy[1] = librapl_energy_uJ() - rc6_sample_energy[0];
	dt = ktime_sub(ktime_get(), dt);
	res[1] = rc6_residency(rc6);
	if (res[1] == res[0]) {
		pr_err("Did not enter RC6! RC6_STATE=%08x, RC6_CONTROL=%08x, residency=%lld\n",
		       intel_uncore_read_fw(gt->uncore, GEN6_RC_STATE),
		       intel_uncore_read_fw(gt->uncore, GEN6_RC_CONTROL),
		       res[0]);
		err = -EINVAL;
	}

	if (has_power) {
		rc6_power = div64_u64(NSEC_PER_SEC * rc6_sample_energy[1],
				      ktime_to_ns(dt));
		pr_info("GPU consumed %lluuW in RC0 and %lluuW in RC6\n",
			rc0_power, rc6_power);

		if (2 * rc6_power > rc0_power) {
			pr_err("GPU leaked energy while in RC6!\n"
			       "GPU Freq: %uMHz in RC6 and %uMHz in RC0\n"
			       "RC0 energy before & after sleep respectively: %lluuJ %lluuJ\n"
			       "RC6 energy before & after sleep respectively: %lluuJ %lluuJ\n",
			       rc6_freq, rc0_freq, rc0_sample_energy[0], rc0_sample_energy[1],
			       rc6_sample_energy[0], rc6_sample_energy[1]);

			diff = res[1] - res[0];
			threshold = (9 * NSEC_PER_MSEC * sleep_time) / 10;
			if (diff < threshold)
				pr_err("Did not enter RC6 properly, RC6 start residency=%lluns, RC6 end residency=%lluns\n",
				       res[0], res[1]);
			err = -EINVAL;
			goto out_unlock;
		}
	}

	/* Restore what should have been the original state! */
	intel_rc6_unpark(rc6);

out_unlock:
	intel_runtime_pm_put(gt->uncore->rpm, wakeref);
	return err;
}

static const u32 *__live_rc6_ctx(struct intel_context *ce)
{
	struct i915_request *rq;
	const u32 *result;
	u32 cmd;
	u32 *cs;

	rq = intel_context_create_request(ce);
	if (IS_ERR(rq))
		return ERR_CAST(rq);

	cs = intel_ring_begin(rq, 4);
	if (IS_ERR(cs)) {
		i915_request_add(rq);
		return cs;
	}

	cmd = MI_STORE_REGISTER_MEM | MI_USE_GGTT;
	if (GRAPHICS_VER(rq->i915) >= 8)
		cmd++;

	*cs++ = cmd;
	*cs++ = i915_mmio_reg_offset(GEN8_RC6_CTX_INFO);
	*cs++ = ce->timeline->hwsp_offset + 8;
	*cs++ = 0;
	intel_ring_advance(rq, cs);

Annotation

Implementation Notes