drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h- Extension
.h- Size
- 15392 bytes
- Lines
- 509
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bits.hlinux/compiler.hlinux/types.hgt/intel_engine_types.habi/guc_actions_abi.habi/guc_actions_slpc_abi.habi/guc_errors_abi.habi/guc_communication_mmio_abi.habi/guc_communication_ctb_abi.habi/guc_klvs_abi.habi/guc_messages_abi.h
Detected Declarations
struct guc_wq_itemstruct guc_process_desc_v69struct guc_sched_wq_descstruct guc_ctxt_registration_infostruct guc_lrc_desc_v69struct guc_klv_generic_dw_tstruct guc_update_context_policy_headerstruct guc_update_context_policystruct guc_update_scheduling_policy_headerstruct guc_update_scheduling_policystruct guc_policiesstruct guc_mmio_regstruct guc_mmio_reg_setstruct guc_gt_system_infostruct guc_adsstruct guc_engine_usage_recordstruct guc_engine_usagestruct guc_log_buffer_stateenum guc_capture_typeenum guc_log_buffer_typeenum intel_guc_recv_messagefunction engine_class_to_guc_classfunction guc_class_to_engine_classfunction guc_policy_max_exec_quantum_msfunction guc_policy_max_preempt_timeout_ms
Annotated Snippet
struct guc_wq_item {
u32 header;
u32 context_desc;
u32 submit_element_info;
u32 fence_id;
} __packed;
struct guc_process_desc_v69 {
u32 stage_id;
u64 db_base_addr;
u32 head;
u32 tail;
u32 error_offset;
u64 wq_base_addr;
u32 wq_size_bytes;
u32 wq_status;
u32 engine_presence;
u32 priority;
u32 reserved[36];
} __packed;
struct guc_sched_wq_desc {
u32 head;
u32 tail;
u32 error_offset;
u32 wq_status;
u32 reserved[28];
} __packed;
/* Helper for context registration H2G */
struct guc_ctxt_registration_info {
u32 flags;
u32 context_idx;
u32 engine_class;
u32 engine_submit_mask;
u32 wq_desc_lo;
u32 wq_desc_hi;
u32 wq_base_lo;
u32 wq_base_hi;
u32 wq_size;
u32 hwlrca_lo;
u32 hwlrca_hi;
};
#define CONTEXT_REGISTRATION_FLAG_KMD BIT(0)
/* Preempt to idle on quantum expiry */
#define CONTEXT_POLICY_FLAG_PREEMPT_TO_IDLE_V69 BIT(0)
/*
* GuC Context registration descriptor.
* FIXME: This is only required to exist during context registration.
* The current 1:1 between guc_lrc_desc and LRCs for the lifetime of the LRC
* is not required.
*/
struct guc_lrc_desc_v69 {
u32 hw_context_desc;
u32 slpm_perf_mode_hint; /* SPLC v1 only */
u32 slpm_freq_hint;
u32 engine_submit_mask; /* In logical space */
u8 engine_class;
u8 reserved0[3];
u32 priority;
u32 process_desc;
u32 wq_addr;
u32 wq_size;
u32 context_flags; /* CONTEXT_REGISTRATION_* */
/* Time for one workload to execute. (in micro seconds) */
u32 execution_quantum;
/* Time to wait for a preemption request to complete before issuing a
* reset. (in micro seconds).
*/
u32 preemption_timeout;
u32 policy_flags; /* CONTEXT_POLICY_* */
u32 reserved1[19];
} __packed;
/* 32-bit KLV structure as used by policy updates and others */
struct guc_klv_generic_dw_t {
u32 kl;
u32 value;
} __packed;
/* Format of the UPDATE_CONTEXT_POLICIES H2G data packet */
struct guc_update_context_policy_header {
u32 action;
u32 ctx_id;
} __packed;
struct guc_update_context_policy {
struct guc_update_context_policy_header header;
Annotation
- Immediate include surface: `linux/bits.h`, `linux/compiler.h`, `linux/types.h`, `gt/intel_engine_types.h`, `abi/guc_actions_abi.h`, `abi/guc_actions_slpc_abi.h`, `abi/guc_errors_abi.h`, `abi/guc_communication_mmio_abi.h`.
- Detected declarations: `struct guc_wq_item`, `struct guc_process_desc_v69`, `struct guc_sched_wq_desc`, `struct guc_ctxt_registration_info`, `struct guc_lrc_desc_v69`, `struct guc_klv_generic_dw_t`, `struct guc_update_context_policy_header`, `struct guc_update_context_policy`, `struct guc_update_scheduling_policy_header`, `struct guc_update_scheduling_policy`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.