drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h
Extension
.h
Size
5118 bytes
Lines
159
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct guc_doorbell_info {
	u32 db_status;
#define GUC_DOORBELL_DISABLED		0
#define GUC_DOORBELL_ENABLED		1

	u32 cookie;
	u32 reserved[14];
} __packed;

#define GEN8_DRBREGL(x)			_MMIO(0x1000 + (x) * 8)
#define   GEN8_DRB_VALID		  (1<<0)
#define GEN8_DRBREGU(x)			_MMIO(0x1000 + (x) * 8 + 4)

#define GEN12_DIST_DBS_POPULATED		_MMIO(0xd08)
#define   GEN12_DOORBELLS_PER_SQIDI_SHIFT	16
#define   GEN12_DOORBELLS_PER_SQIDI		(0xff)
#define   GEN12_SQIDIS_DOORBELL_EXIST		(0xffff)

#define DE_GUCRMR			_MMIO(0x44054)

#define GUC_BCS_RCS_IER			_MMIO(0xC550)
#define GUC_VCS2_VCS1_IER		_MMIO(0xC554)
#define GUC_WD_VECS_IER			_MMIO(0xC558)
#define GUC_PM_P24C_IER			_MMIO(0xC55C)

/* GuC Interrupt Vector */
#define GUC_INTR_GUC2HOST		BIT(15)
#define GUC_INTR_EXEC_ERROR		BIT(14)
#define GUC_INTR_DISPLAY_EVENT		BIT(13)
#define GUC_INTR_SEM_SIG		BIT(12)
#define GUC_INTR_IOMMU2GUC		BIT(11)
#define GUC_INTR_DOORBELL_RANG		BIT(10)
#define GUC_INTR_DMA_DONE		BIT(9)
#define GUC_INTR_FATAL_ERROR		BIT(8)
#define GUC_INTR_NOTIF_ERROR		BIT(7)
#define GUC_INTR_SW_INT_6		BIT(6)
#define GUC_INTR_SW_INT_5		BIT(5)
#define GUC_INTR_SW_INT_4		BIT(4)
#define GUC_INTR_SW_INT_3		BIT(3)
#define GUC_INTR_SW_INT_2		BIT(2)
#define GUC_INTR_SW_INT_1		BIT(1)
#define GUC_INTR_SW_INT_0		BIT(0)

#endif

Annotation

Implementation Notes