drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h
Extension
.h
Size
10107 bytes
Lines
315
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct intel_uc_fw_ver {
	u32 major;
	u32 minor;
	u32 patch;
	u32 build;
};

/*
 * The firmware build process will generate a version header file with major and
 * minor version defined. The versions are built into CSS header of firmware.
 * i915 kernel driver set the minimal firmware version required per platform.
 */
struct intel_uc_fw_file {
	const char *path;
	struct intel_uc_fw_ver ver;
};

/*
 * This structure encapsulates all the data needed during the process
 * of fetching, caching, and loading the firmware image into the uC.
 */
struct intel_uc_fw {
	enum intel_uc_fw_type type;
	union {
		const enum intel_uc_fw_status status;
		enum intel_uc_fw_status __status; /* no accidental overwrites */
	};
	struct intel_uc_fw_file file_wanted;
	struct intel_uc_fw_file file_selected;
	bool user_overridden;
	size_t size;
	struct drm_i915_gem_object *obj;

	/**
	 * @needs_ggtt_mapping: indicates whether the fw object needs to be
	 * pinned to ggtt. If true, the fw is pinned at init time and unpinned
	 * during driver unload.
	 */
	bool needs_ggtt_mapping;

	/**
	 * @vma_res: A vma resource used in binding the uc fw to ggtt. The fw is
	 * pinned in a reserved area of the ggtt (above the maximum address
	 * usable by GuC); therefore, we can't use the normal vma functions to
	 * do the pinning and we instead use this resource to do so.
	 */
	struct i915_vma_resource vma_res;
	struct i915_vma *rsa_data;

	u32 rsa_size;
	u32 ucode_size;
	u32 private_data_size;

	u32 dma_start_offset;

	bool has_gsc_headers;
};

/*
 * When we load the uC binaries, we pin them in a reserved section at the top of
 * the GGTT, which is ~18 MBs. On multi-GT systems where the GTs share the GGTT,
 * we also need to make sure that each binary is pinned to a unique location
 * during load, because the different GT can go through the FW load at the same
 * time (see uc_fw_ggtt_offset() for details).
 * Given that the available space is much greater than what is required by the
 * binaries, to keep things simple instead of dynamically partitioning the
 * reserved section to make space for all the blobs we can just reserve a static
 * chunk for each binary.
 */
#define INTEL_UC_RSVD_GGTT_PER_FW SZ_2M

#ifdef CONFIG_DRM_I915_DEBUG_GUC
void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw,
			       enum intel_uc_fw_status status);
#else
static inline void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw,
					     enum intel_uc_fw_status status)
{
	uc_fw->__status = status;
}
#endif

static inline
const char *intel_uc_fw_status_repr(enum intel_uc_fw_status status)
{
	switch (status) {
	case INTEL_UC_FIRMWARE_NOT_SUPPORTED:
		return "N/A";
	case INTEL_UC_FIRMWARE_UNINITIALIZED:
		return "UNINITIALIZED";

Annotation

Implementation Notes