drivers/gpu/drm/i915/i915_dpt.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/i915/i915_dpt.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/i915/i915_dpt.c- Extension
.c- Size
- 6565 bytes
- Lines
- 277
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
drm/drm_print.hdrm/intel/display_parent_interface.hdisplay/intel_display_core.hgem/i915_gem_domain.hgem/i915_gem_internal.hgem/i915_gem_lmem.hgt/gen8_ppgtt.hi915_dpt.hi915_drv.h
Detected Declarations
struct intel_dptfunction i915_vm_to_dptfunction gen8_set_ptefunction dpt_insert_pagefunction dpt_insert_entriesfunction dpt_clear_rangefunction dpt_unbind_vmafunction dpt_cleanupfunction for_i915_gem_wwfunction i915_dpt_unpin_from_ggttfunction i915_dpt_destroyfunction i915_dpt_suspendfunction i915_dpt_resumefunction i915_dpt_offset
Annotated Snippet
struct intel_dpt {
struct i915_address_space vm;
struct drm_i915_gem_object *obj;
struct i915_vma *vma;
void __iomem *iomem;
};
#define i915_is_dpt(vm) ((vm)->is_dpt)
static inline struct intel_dpt *
i915_vm_to_dpt(struct i915_address_space *vm)
{
BUILD_BUG_ON(offsetof(struct intel_dpt, vm));
drm_WARN_ON(&vm->i915->drm, !i915_is_dpt(vm));
return container_of(vm, struct intel_dpt, vm);
}
struct i915_address_space *i915_dpt_to_vm(struct intel_dpt *dpt)
{
return &dpt->vm;
}
static void gen8_set_pte(void __iomem *addr, gen8_pte_t pte)
{
writeq(pte, addr);
}
static void dpt_insert_page(struct i915_address_space *vm,
dma_addr_t addr,
u64 offset,
unsigned int pat_index,
u32 flags)
{
struct intel_dpt *dpt = i915_vm_to_dpt(vm);
gen8_pte_t __iomem *base = dpt->iomem;
gen8_set_pte(base + offset / I915_GTT_PAGE_SIZE,
vm->pte_encode(addr, pat_index, flags));
}
static void dpt_insert_entries(struct i915_address_space *vm,
struct i915_vma_resource *vma_res,
unsigned int pat_index,
u32 flags)
{
struct intel_dpt *dpt = i915_vm_to_dpt(vm);
gen8_pte_t __iomem *base = dpt->iomem;
const gen8_pte_t pte_encode = vm->pte_encode(0, pat_index, flags);
struct sgt_iter sgt_iter;
dma_addr_t addr;
int i;
/*
* Note that we ignore PTE_READ_ONLY here. The caller must be careful
* not to allow the user to override access to a read only page.
*/
i = vma_res->start / I915_GTT_PAGE_SIZE;
for_each_sgt_daddr(addr, sgt_iter, vma_res->bi.pages)
gen8_set_pte(&base[i++], pte_encode | addr);
}
static void dpt_clear_range(struct i915_address_space *vm,
u64 start, u64 length)
{
}
static void dpt_bind_vma(struct i915_address_space *vm,
struct i915_vm_pt_stash *stash,
struct i915_vma_resource *vma_res,
unsigned int pat_index,
u32 flags)
{
u32 pte_flags;
if (vma_res->bound_flags)
return;
/* Applicable to VLV (gen8+ do not support RO in the GGTT) */
pte_flags = 0;
if (vm->has_read_only && vma_res->bi.readonly)
pte_flags |= PTE_READ_ONLY;
if (vma_res->bi.lmem)
pte_flags |= PTE_LM;
vm->insert_entries(vm, vma_res, pat_index, pte_flags);
vma_res->page_sizes_gtt = I915_GTT_PAGE_SIZE;
Annotation
- Immediate include surface: `drm/drm_print.h`, `drm/intel/display_parent_interface.h`, `display/intel_display_core.h`, `gem/i915_gem_domain.h`, `gem/i915_gem_internal.h`, `gem/i915_gem_lmem.h`, `gt/gen8_ppgtt.h`, `i915_dpt.h`.
- Detected declarations: `struct intel_dpt`, `function i915_vm_to_dpt`, `function gen8_set_pte`, `function dpt_insert_page`, `function dpt_insert_entries`, `function dpt_clear_range`, `function dpt_unbind_vma`, `function dpt_cleanup`, `function for_i915_gem_ww`, `function i915_dpt_unpin_from_ggtt`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.