drivers/gpu/drm/i915/i915_vma_types.h

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/i915/i915_vma_types.h

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/i915/i915_vma_types.h
Extension
.h
Size
9064 bytes
Lines
256
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct i915_vma {
	struct drm_mm_node node;

	struct i915_address_space *vm;
	const struct i915_vma_ops *ops;

	struct drm_i915_gem_object *obj;

	struct sg_table *pages;
	void __iomem *iomap;
	void *private; /* owned by creator */

	struct i915_fence_reg *fence;

	u64 size;
	struct i915_page_sizes page_sizes;

	/* mmap-offset associated with fencing for this vma */
	struct i915_mmap_offset	*mmo;

	u32 guard; /* padding allocated around vma->pages within the node */
	u32 fence_size;
	u32 fence_alignment;
	u32 display_alignment;

	/**
	 * Count of the number of times this vma has been opened by different
	 * handles (but same file) for execbuf, i.e. the number of aliases
	 * that exist in the ctx->handle_vmas LUT for this vma.
	 */
	atomic_t open_count;
	atomic_t flags;
	/**
	 * How many users have pinned this object in GTT space.
	 *
	 * This is a tightly bound, fairly small number of users, so we
	 * stuff inside the flags field so that we can both check for overflow
	 * and detect a no-op i915_vma_pin() in a single check, while also
	 * pinning the vma.
	 *
	 * The worst case display setup would have the same vma pinned for
	 * use on each plane on each crtc, while also building the next atomic
	 * state and holding a pin for the length of the cleanup queue. In the
	 * future, the flip queue may be increased from 1.
	 * Estimated worst case: 3 [qlen] * 4 [max crtcs] * 7 [max planes] = 84
	 *
	 * For GEM, the number of concurrent users for pwrite/pread is
	 * unbounded. For execbuffer, it is currently one but will in future
	 * be extended to allow multiple clients to pin vma concurrently.
	 *
	 * We also use suballocated pages, with each suballocation claiming
	 * its own pin on the shared vma. At present, this is limited to
	 * exclusive cachelines of a single page, so a maximum of 64 possible
	 * users.
	 */
#define I915_VMA_PIN_MASK 0x3ff
#define I915_VMA_OVERFLOW 0x200

	/** Flags and address space this VMA is bound to */
#define I915_VMA_GLOBAL_BIND_BIT 10
#define I915_VMA_LOCAL_BIND_BIT  11

#define I915_VMA_GLOBAL_BIND	((int)BIT(I915_VMA_GLOBAL_BIND_BIT))
#define I915_VMA_LOCAL_BIND	((int)BIT(I915_VMA_LOCAL_BIND_BIT))

#define I915_VMA_BIND_MASK (I915_VMA_GLOBAL_BIND | I915_VMA_LOCAL_BIND)

#define I915_VMA_ERROR_BIT	12
#define I915_VMA_ERROR		((int)BIT(I915_VMA_ERROR_BIT))

#define I915_VMA_GGTT_BIT	13
#define I915_VMA_CAN_FENCE_BIT	14
#define I915_VMA_USERFAULT_BIT	15
#define I915_VMA_GGTT_WRITE_BIT	16

#define I915_VMA_GGTT		((int)BIT(I915_VMA_GGTT_BIT))
#define I915_VMA_CAN_FENCE	((int)BIT(I915_VMA_CAN_FENCE_BIT))
#define I915_VMA_USERFAULT	((int)BIT(I915_VMA_USERFAULT_BIT))
#define I915_VMA_GGTT_WRITE	((int)BIT(I915_VMA_GGTT_WRITE_BIT))

#define I915_VMA_SCANOUT_BIT	17
#define I915_VMA_SCANOUT	((int)BIT(I915_VMA_SCANOUT_BIT))

	struct i915_active active;

#define I915_VMA_PAGES_BIAS 24
#define I915_VMA_PAGES_ACTIVE (BIT(24) | 1)
	atomic_t pages_count; /* number of active binds to the pages */

	/**

Annotation

Implementation Notes