drivers/gpu/drm/i915/intel_device_info.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/i915/intel_device_info.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/i915/intel_device_info.c- Extension
.c- Size
- 13221 bytes
- Lines
- 430
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/string_helpers.hdrm/drm_print.hdrm/intel/pciids.hgt/intel_gt_regs.hi915_drv.hi915_reg.hi915_utils.hintel_device_info.h
Detected Declarations
function intel_device_info_printfunction find_devidfunction intel_device_info_subplatform_initfunction ARRAY_SIZEfunction ARRAY_SIZEfunction ARRAY_SIZEfunction ARRAY_SIZEfunction ARRAY_SIZEfunction ARRAY_SIZEfunction ARRAY_SIZEfunction ARRAY_SIZEfunction ARRAY_SIZEfunction ARRAY_SIZEfunction ARRAY_SIZEfunction ARRAY_SIZEfunction ip_ver_readfunction intel_ipver_early_initfunction INTEL_INFOfunction intel_device_info_runtime_init_earlyfunction intel_device_info_runtime_initfunction intel_device_info_driver_createfunction intel_driver_caps_print
Annotated Snippet
ARRAY_SIZE(subplatform_ult_ids))) {
mask = BIT(INTEL_SUBPLATFORM_ULT);
} else if (find_devid(devid, subplatform_ulx_ids,
ARRAY_SIZE(subplatform_ulx_ids))) {
mask = BIT(INTEL_SUBPLATFORM_ULX);
if (IS_HASWELL(i915) || IS_BROADWELL(i915)) {
/* ULX machines are also considered ULT. */
mask |= BIT(INTEL_SUBPLATFORM_ULT);
}
} else if (find_devid(devid, subplatform_portf_ids,
ARRAY_SIZE(subplatform_portf_ids))) {
mask = BIT(INTEL_SUBPLATFORM_PORTF);
} else if (find_devid(devid, subplatform_uy_ids,
ARRAY_SIZE(subplatform_uy_ids))) {
mask = BIT(INTEL_SUBPLATFORM_UY);
} else if (find_devid(devid, subplatform_n_ids,
ARRAY_SIZE(subplatform_n_ids))) {
mask = BIT(INTEL_SUBPLATFORM_N);
} else if (find_devid(devid, subplatform_rpl_ids,
ARRAY_SIZE(subplatform_rpl_ids))) {
mask = BIT(INTEL_SUBPLATFORM_RPL);
if (find_devid(devid, subplatform_rplu_ids,
ARRAY_SIZE(subplatform_rplu_ids)))
mask |= BIT(INTEL_SUBPLATFORM_RPLU);
} else if (find_devid(devid, subplatform_g10_ids,
ARRAY_SIZE(subplatform_g10_ids))) {
mask = BIT(INTEL_SUBPLATFORM_G10);
} else if (find_devid(devid, subplatform_g11_ids,
ARRAY_SIZE(subplatform_g11_ids))) {
mask = BIT(INTEL_SUBPLATFORM_G11);
} else if (find_devid(devid, subplatform_g12_ids,
ARRAY_SIZE(subplatform_g12_ids))) {
mask = BIT(INTEL_SUBPLATFORM_G12);
} else if (find_devid(devid, subplatform_arl_h_ids,
ARRAY_SIZE(subplatform_arl_h_ids))) {
mask = BIT(INTEL_SUBPLATFORM_ARL_H);
} else if (find_devid(devid, subplatform_arl_u_ids,
ARRAY_SIZE(subplatform_arl_u_ids))) {
mask = BIT(INTEL_SUBPLATFORM_ARL_U);
} else if (find_devid(devid, subplatform_arl_s_ids,
ARRAY_SIZE(subplatform_arl_s_ids))) {
mask = BIT(INTEL_SUBPLATFORM_ARL_S);
}
/* DG2_D ids span across multiple DG2 subplatforms */
if (find_devid(devid, subplatform_dg2_d_ids,
ARRAY_SIZE(subplatform_dg2_d_ids)))
mask |= BIT(INTEL_SUBPLATFORM_D);
GEM_BUG_ON(mask & ~INTEL_SUBPLATFORM_MASK);
RUNTIME_INFO(i915)->platform_mask[pi] |= mask;
}
static void ip_ver_read(struct drm_i915_private *i915, u32 offset, struct intel_ip_version *ip)
{
struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
void __iomem *addr;
u32 val;
u8 expected_ver = ip->ver;
u8 expected_rel = ip->rel;
addr = pci_iomap_range(pdev, 0, offset, sizeof(u32));
if (drm_WARN_ON(&i915->drm, !addr))
return;
val = ioread32(addr);
pci_iounmap(pdev, addr);
ip->ver = REG_FIELD_GET(GMD_ID_ARCH_MASK, val);
ip->rel = REG_FIELD_GET(GMD_ID_RELEASE_MASK, val);
ip->step = REG_FIELD_GET(GMD_ID_STEP, val);
/* Sanity check against expected versions from device info */
if (IP_VER(ip->ver, ip->rel) < IP_VER(expected_ver, expected_rel))
drm_dbg(&i915->drm,
"Hardware reports GMD IP version %u.%u (REG[0x%x] = 0x%08x) but minimum expected is %u.%u\n",
ip->ver, ip->rel, offset, val, expected_ver, expected_rel);
}
/*
* Setup the graphics version for the current device. This must be done before
* any code that performs checks on GRAPHICS_VER or DISPLAY_VER, so this
* function should be called very early in the driver initialization sequence.
*
* Regular MMIO access is not yet setup at the point this function is called so
* we peek at the appropriate MMIO offset directly. The GMD_ID register is
* part of an 'always on' power well by design, so we don't need to worry about
* forcewake while reading it.
*/
Annotation
- Immediate include surface: `linux/string_helpers.h`, `drm/drm_print.h`, `drm/intel/pciids.h`, `gt/intel_gt_regs.h`, `i915_drv.h`, `i915_reg.h`, `i915_utils.h`, `intel_device_info.h`.
- Detected declarations: `function intel_device_info_print`, `function find_devid`, `function intel_device_info_subplatform_init`, `function ARRAY_SIZE`, `function ARRAY_SIZE`, `function ARRAY_SIZE`, `function ARRAY_SIZE`, `function ARRAY_SIZE`, `function ARRAY_SIZE`, `function ARRAY_SIZE`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.