drivers/gpu/drm/i915/intel_uncore.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/i915/intel_uncore.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/i915/intel_uncore.h- Extension
.h- Size
- 16807 bytes
- Lines
- 519
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/spinlock.hlinux/notifier.hlinux/hrtimer.hlinux/io-64-nonatomic-lo-hi.hlinux/types.hi915_reg_defs.h
Detected Declarations
struct drm_devicestruct drm_i915_privatestruct intel_runtime_pmstruct intel_uncorestruct intel_gtstruct intel_uncore_mmio_debugstruct intel_uncore_fw_getstruct intel_uncore_funcsstruct intel_forcewake_rangestruct intel_uncorestruct intel_uncore_forcewake_domainenum forcewake_domain_idenum forcewake_domainsfunction for_each_iffunction intel_uncore_has_fpga_dbg_unclaimedfunction intel_uncore_has_dbg_unclaimedfunction intel_uncore_has_fifofunction intel_uncore_needs_flr_on_finifunction intel_uncore_set_flr_on_finifunction intel_wait_for_registerfunction intel_wait_for_register_fwfunction intel_uncore_forcewake_for_regfunction intel_uncore_rmw_fwfunction intel_uncore_read64_2x32function intel_uncore_write_and_verify
Annotated Snippet
struct intel_uncore_mmio_debug {
spinlock_t lock; /** lock is also taken in irq contexts. */
int unclaimed_mmio_check;
int saved_mmio_check;
u32 suspend_count;
};
enum forcewake_domain_id {
FW_DOMAIN_ID_RENDER = 0,
FW_DOMAIN_ID_GT, /* also includes blitter engine */
FW_DOMAIN_ID_MEDIA,
FW_DOMAIN_ID_MEDIA_VDBOX0,
FW_DOMAIN_ID_MEDIA_VDBOX1,
FW_DOMAIN_ID_MEDIA_VDBOX2,
FW_DOMAIN_ID_MEDIA_VDBOX3,
FW_DOMAIN_ID_MEDIA_VDBOX4,
FW_DOMAIN_ID_MEDIA_VDBOX5,
FW_DOMAIN_ID_MEDIA_VDBOX6,
FW_DOMAIN_ID_MEDIA_VDBOX7,
FW_DOMAIN_ID_MEDIA_VEBOX0,
FW_DOMAIN_ID_MEDIA_VEBOX1,
FW_DOMAIN_ID_MEDIA_VEBOX2,
FW_DOMAIN_ID_MEDIA_VEBOX3,
FW_DOMAIN_ID_GSC,
FW_DOMAIN_ID_COUNT
};
enum forcewake_domains {
FORCEWAKE_RENDER = BIT(FW_DOMAIN_ID_RENDER),
FORCEWAKE_GT = BIT(FW_DOMAIN_ID_GT),
FORCEWAKE_MEDIA = BIT(FW_DOMAIN_ID_MEDIA),
FORCEWAKE_MEDIA_VDBOX0 = BIT(FW_DOMAIN_ID_MEDIA_VDBOX0),
FORCEWAKE_MEDIA_VDBOX1 = BIT(FW_DOMAIN_ID_MEDIA_VDBOX1),
FORCEWAKE_MEDIA_VDBOX2 = BIT(FW_DOMAIN_ID_MEDIA_VDBOX2),
FORCEWAKE_MEDIA_VDBOX3 = BIT(FW_DOMAIN_ID_MEDIA_VDBOX3),
FORCEWAKE_MEDIA_VDBOX4 = BIT(FW_DOMAIN_ID_MEDIA_VDBOX4),
FORCEWAKE_MEDIA_VDBOX5 = BIT(FW_DOMAIN_ID_MEDIA_VDBOX5),
FORCEWAKE_MEDIA_VDBOX6 = BIT(FW_DOMAIN_ID_MEDIA_VDBOX6),
FORCEWAKE_MEDIA_VDBOX7 = BIT(FW_DOMAIN_ID_MEDIA_VDBOX7),
FORCEWAKE_MEDIA_VEBOX0 = BIT(FW_DOMAIN_ID_MEDIA_VEBOX0),
FORCEWAKE_MEDIA_VEBOX1 = BIT(FW_DOMAIN_ID_MEDIA_VEBOX1),
FORCEWAKE_MEDIA_VEBOX2 = BIT(FW_DOMAIN_ID_MEDIA_VEBOX2),
FORCEWAKE_MEDIA_VEBOX3 = BIT(FW_DOMAIN_ID_MEDIA_VEBOX3),
FORCEWAKE_GSC = BIT(FW_DOMAIN_ID_GSC),
FORCEWAKE_ALL = BIT(FW_DOMAIN_ID_COUNT) - 1,
};
struct intel_uncore_fw_get {
void (*force_wake_get)(struct intel_uncore *uncore,
enum forcewake_domains domains);
};
struct intel_uncore_funcs {
enum forcewake_domains (*read_fw_domains)(struct intel_uncore *uncore,
i915_reg_t r);
enum forcewake_domains (*write_fw_domains)(struct intel_uncore *uncore,
i915_reg_t r);
u8 (*mmio_readb)(struct intel_uncore *uncore,
i915_reg_t r, bool trace);
u16 (*mmio_readw)(struct intel_uncore *uncore,
i915_reg_t r, bool trace);
u32 (*mmio_readl)(struct intel_uncore *uncore,
i915_reg_t r, bool trace);
u64 (*mmio_readq)(struct intel_uncore *uncore,
i915_reg_t r, bool trace);
void (*mmio_writeb)(struct intel_uncore *uncore,
i915_reg_t r, u8 val, bool trace);
void (*mmio_writew)(struct intel_uncore *uncore,
i915_reg_t r, u16 val, bool trace);
void (*mmio_writel)(struct intel_uncore *uncore,
i915_reg_t r, u32 val, bool trace);
};
struct intel_forcewake_range {
u32 start;
u32 end;
enum forcewake_domains domains;
};
struct intel_uncore {
void __iomem *regs;
struct drm_i915_private *i915;
struct intel_gt *gt;
struct intel_runtime_pm *rpm;
Annotation
- Immediate include surface: `linux/spinlock.h`, `linux/notifier.h`, `linux/hrtimer.h`, `linux/io-64-nonatomic-lo-hi.h`, `linux/types.h`, `i915_reg_defs.h`.
- Detected declarations: `struct drm_device`, `struct drm_i915_private`, `struct intel_runtime_pm`, `struct intel_uncore`, `struct intel_gt`, `struct intel_uncore_mmio_debug`, `struct intel_uncore_fw_get`, `struct intel_uncore_funcs`, `struct intel_forcewake_range`, `struct intel_uncore`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.