drivers/gpu/drm/i915/pxp/intel_pxp_cmd.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/i915/pxp/intel_pxp_cmd.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/i915/pxp/intel_pxp_cmd.c
Extension
.c
Size
2957 bytes
Lines
144
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: MIT
/*
 * Copyright(c) 2020, Intel Corporation. All rights reserved.
 */

#include "gt/intel_context.h"
#include "gt/intel_engine_pm.h"
#include "gt/intel_gpu_commands.h"
#include "gt/intel_ring.h"

#include "i915_trace.h"

#include "intel_pxp.h"
#include "intel_pxp_cmd.h"
#include "intel_pxp_session.h"
#include "intel_pxp_types.h"

/* stall until prior PXP and MFX/HCP/HUC objects are cmopleted */
#define MFX_WAIT_PXP (MFX_WAIT | \
		      MFX_WAIT_DW0_PXP_SYNC_CONTROL_FLAG | \
		      MFX_WAIT_DW0_MFX_SYNC_CONTROL_FLAG)

static u32 *pxp_emit_session_selection(u32 *cs, u32 idx)
{
	*cs++ = MFX_WAIT_PXP;

	/* pxp off */
	*cs++ = MI_FLUSH_DW;
	*cs++ = 0;
	*cs++ = 0;

	/* select session */
	*cs++ = MI_SET_APPID | MI_SET_APPID_SESSION_ID(idx);

	*cs++ = MFX_WAIT_PXP;

	/* pxp on */
	*cs++ = MI_FLUSH_DW | MI_FLUSH_DW_PROTECTED_MEM_EN |
		MI_FLUSH_DW_OP_STOREDW | MI_FLUSH_DW_STORE_INDEX;
	*cs++ = I915_GEM_HWS_PXP_ADDR | MI_FLUSH_DW_USE_GTT;
	*cs++ = 0;

	*cs++ = MFX_WAIT_PXP;

	return cs;
}

static u32 *pxp_emit_inline_termination(u32 *cs)
{
	/* session inline termination */
	*cs++ = CRYPTO_KEY_EXCHANGE;
	*cs++ = 0;

	return cs;
}

static u32 *pxp_emit_session_termination(u32 *cs, u32 idx)
{
	cs = pxp_emit_session_selection(cs, idx);
	cs = pxp_emit_inline_termination(cs);

	return cs;
}

static u32 *pxp_emit_wait(u32 *cs)
{
	/* wait for cmds to go through */
	*cs++ = MFX_WAIT_PXP;
	*cs++ = 0;

	return cs;
}

/*
 * if we ever need to terminate more than one session, we can submit multiple
 * selections and terminations back-to-back with a single wait at the end
 */
#define SELECTION_LEN 10
#define TERMINATION_LEN 2
#define SESSION_TERMINATION_LEN(x) ((SELECTION_LEN + TERMINATION_LEN) * (x))
#define WAIT_LEN 2

static void pxp_request_commit(struct i915_request *rq)
{
	struct i915_sched_attr attr = { .priority = I915_PRIORITY_MAX };
	struct intel_timeline * const tl = i915_request_timeline(rq);

	lockdep_unpin_lock(&tl->mutex, rq->cookie);

	trace_i915_request_add(rq);

Annotation

Implementation Notes