drivers/gpu/drm/i915/selftests/igt_spinner.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/i915/selftests/igt_spinner.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/i915/selftests/igt_spinner.c- Extension
.c- Size
- 5842 bytes
- Lines
- 266
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
gem/i915_gem_internal.hgem/selftests/igt_gem_utils.hgt/intel_gpu_commands.hgt/intel_gt.hi915_wait_util.higt_spinner.h
Detected Declarations
function igt_spinner_initfunction igt_spinner_pinfunction seqno_offsetfunction hws_addressfunction igt_spinner_create_requestfunction hws_seqnofunction igt_spinner_endfunction igt_spinner_finifunction igt_wait_for_spinner
Annotated Snippet
#include "gem/i915_gem_internal.h"
#include "gem/selftests/igt_gem_utils.h"
#include "gt/intel_gpu_commands.h"
#include "gt/intel_gt.h"
#include "i915_wait_util.h"
#include "igt_spinner.h"
int igt_spinner_init(struct igt_spinner *spin, struct intel_gt *gt)
{
int err;
memset(spin, 0, sizeof(*spin));
spin->gt = gt;
spin->hws = i915_gem_object_create_internal(gt->i915, PAGE_SIZE);
if (IS_ERR(spin->hws)) {
err = PTR_ERR(spin->hws);
goto err;
}
i915_gem_object_set_cache_coherency(spin->hws, I915_CACHE_LLC);
spin->obj = i915_gem_object_create_internal(gt->i915, PAGE_SIZE);
if (IS_ERR(spin->obj)) {
err = PTR_ERR(spin->obj);
goto err_hws;
}
return 0;
err_hws:
i915_gem_object_put(spin->hws);
err:
return err;
}
static void *igt_spinner_pin_obj(struct intel_context *ce,
struct i915_gem_ww_ctx *ww,
struct drm_i915_gem_object *obj,
unsigned int mode, struct i915_vma **vma)
{
void *vaddr;
int ret;
*vma = i915_vma_instance(obj, ce->vm, NULL);
if (IS_ERR(*vma))
return ERR_CAST(*vma);
ret = i915_gem_object_lock(obj, ww);
if (ret)
return ERR_PTR(ret);
vaddr = i915_gem_object_pin_map(obj, mode);
if (!ww)
i915_gem_object_unlock(obj);
if (IS_ERR(vaddr))
return vaddr;
if (ww)
ret = i915_vma_pin_ww(*vma, ww, 0, 0, PIN_USER);
else
ret = i915_vma_pin(*vma, 0, 0, PIN_USER);
if (ret) {
i915_gem_object_unpin_map(obj);
return ERR_PTR(ret);
}
return vaddr;
}
int igt_spinner_pin(struct igt_spinner *spin,
struct intel_context *ce,
struct i915_gem_ww_ctx *ww)
{
void *vaddr;
if (spin->ce && WARN_ON(spin->ce != ce))
return -ENODEV;
spin->ce = ce;
if (!spin->seqno) {
vaddr = igt_spinner_pin_obj(ce, ww, spin->hws, I915_MAP_WB, &spin->hws_vma);
if (IS_ERR(vaddr))
return PTR_ERR(vaddr);
spin->seqno = memset(vaddr, 0xff, PAGE_SIZE);
}
Annotation
- Immediate include surface: `gem/i915_gem_internal.h`, `gem/selftests/igt_gem_utils.h`, `gt/intel_gpu_commands.h`, `gt/intel_gt.h`, `i915_wait_util.h`, `igt_spinner.h`.
- Detected declarations: `function igt_spinner_init`, `function igt_spinner_pin`, `function seqno_offset`, `function hws_address`, `function igt_spinner_create_request`, `function hws_seqno`, `function igt_spinner_end`, `function igt_spinner_fini`, `function igt_wait_for_spinner`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.