drivers/gpu/drm/i915/vlv_iosf_sb.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/i915/vlv_iosf_sb.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/i915/vlv_iosf_sb.c- Extension
.c- Size
- 6366 bytes
- Lines
- 240
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
drm/drm_print.hdrm/intel/display_parent_interface.hi915_drv.hi915_iosf_mbi.hi915_reg.hvlv_iosf_sb.h
Detected Declarations
function pingfunction __vlv_punit_putfunction vlv_iosf_sb_getfunction vlv_iosf_sb_putfunction vlv_sideband_rwfunction unit_to_devfnfunction unit_to_portfunction unit_to_opcodefunction vlv_iosf_sb_readfunction vlv_iosf_sb_writefunction vlv_iosf_sb_initfunction vlv_iosf_sb_fini
Annotated Snippet
// SPDX-License-Identifier: MIT
/*
* Copyright © 2013-2021 Intel Corporation
*/
#include <drm/drm_print.h>
#include <drm/intel/display_parent_interface.h>
#include "i915_drv.h"
#include "i915_iosf_mbi.h"
#include "i915_reg.h"
#include "vlv_iosf_sb.h"
/*
* IOSF sideband, see VLV2_SidebandMsg_HAS.docx and
* VLV_VLV2_PUNIT_HAS_0.8.docx
*/
/* Standard MMIO read, non-posted */
#define SB_MRD_NP 0x00
/* Standard MMIO write, non-posted */
#define SB_MWR_NP 0x01
/* Private register read, double-word addressing, non-posted */
#define SB_CRRDDA_NP 0x06
/* Private register write, double-word addressing, non-posted */
#define SB_CRWRDA_NP 0x07
static void ping(void *info)
{
}
static void __vlv_punit_get(struct drm_i915_private *i915)
{
iosf_mbi_punit_acquire();
/*
* Prevent the cpu from sleeping while we use this sideband, otherwise
* the punit may cause a machine hang. The issue appears to be isolated
* with changing the power state of the CPU package while changing
* the power state via the punit, and we have only observed it
* reliably on 4-core Baytail systems suggesting the issue is in the
* power delivery mechanism and likely to be board/function
* specific. Hence we presume the workaround needs only be applied
* to the Valleyview P-unit and not all sideband communications.
*/
if (IS_VALLEYVIEW(i915)) {
cpu_latency_qos_update_request(&i915->vlv_iosf_sb.qos, 0);
on_each_cpu(ping, NULL, 1);
}
}
static void __vlv_punit_put(struct drm_i915_private *i915)
{
if (IS_VALLEYVIEW(i915))
cpu_latency_qos_update_request(&i915->vlv_iosf_sb.qos,
PM_QOS_DEFAULT_VALUE);
iosf_mbi_punit_release();
}
void vlv_iosf_sb_get(struct drm_device *drm, unsigned long unit_mask)
{
struct drm_i915_private *i915 = to_i915(drm);
if (unit_mask & BIT(VLV_IOSF_SB_PUNIT))
__vlv_punit_get(i915);
mutex_lock(&i915->vlv_iosf_sb.lock);
i915->vlv_iosf_sb.locked_unit_mask |= unit_mask;
}
void vlv_iosf_sb_put(struct drm_device *drm, unsigned long unit_mask)
{
struct drm_i915_private *i915 = to_i915(drm);
i915->vlv_iosf_sb.locked_unit_mask &= ~unit_mask;
drm_WARN_ON(drm, i915->vlv_iosf_sb.locked_unit_mask);
mutex_unlock(&i915->vlv_iosf_sb.lock);
if (unit_mask & BIT(VLV_IOSF_SB_PUNIT))
__vlv_punit_put(i915);
}
static int vlv_sideband_rw(struct drm_i915_private *i915,
u32 devfn, u32 port, u32 opcode,
u32 addr, u32 *val)
{
Annotation
- Immediate include surface: `drm/drm_print.h`, `drm/intel/display_parent_interface.h`, `i915_drv.h`, `i915_iosf_mbi.h`, `i915_reg.h`, `vlv_iosf_sb.h`.
- Detected declarations: `function ping`, `function __vlv_punit_put`, `function vlv_iosf_sb_get`, `function vlv_iosf_sb_put`, `function vlv_sideband_rw`, `function unit_to_devfn`, `function unit_to_port`, `function unit_to_opcode`, `function vlv_iosf_sb_read`, `function vlv_iosf_sb_write`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.