drivers/gpu/drm/imagination/pvr_rogue_defs.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/imagination/pvr_rogue_defs.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/imagination/pvr_rogue_defs.h- Extension
.h- Size
- 5806 bytes
- Lines
- 180
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
pvr_rogue_cr_defs.hlinux/bits.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef PVR_ROGUE_DEFS_H
#define PVR_ROGUE_DEFS_H
#include "pvr_rogue_cr_defs.h"
#include <linux/bits.h>
/*
******************************************************************************
* ROGUE Defines
******************************************************************************
*/
#define ROGUE_FW_MAX_NUM_OS (8U)
#define ROGUE_FW_HOST_OS (0U)
#define ROGUE_FW_GUEST_OSID_START (1U)
#define ROGUE_FW_THREAD_0 (0U)
#define ROGUE_FW_THREAD_1 (1U)
#define GET_ROGUE_CACHE_LINE_SIZE(x) ((((s32)(x)) > 0) ? ((x) / 8) : (0))
#define MAX_HW_GEOM_FRAG_CONTEXTS 2U
#define ROGUE_CR_CLK_CTRL_ALL_ON \
(0x5555555555555555ull & ROGUE_CR_CLK_CTRL_MASKFULL)
#define ROGUE_CR_CLK_CTRL_ALL_AUTO \
(0xaaaaaaaaaaaaaaaaull & ROGUE_CR_CLK_CTRL_MASKFULL)
#define ROGUE_CR_CLK_CTRL2_ALL_ON \
(0x5555555555555555ull & ROGUE_CR_CLK_CTRL2_MASKFULL)
#define ROGUE_CR_CLK_CTRL2_ALL_AUTO \
(0xaaaaaaaaaaaaaaaaull & ROGUE_CR_CLK_CTRL2_MASKFULL)
#define ROGUE_CR_SOFT_RESET_DUST_n_CORE_EN \
(ROGUE_CR_SOFT_RESET_DUST_A_CORE_EN | \
ROGUE_CR_SOFT_RESET_DUST_B_CORE_EN | \
ROGUE_CR_SOFT_RESET_DUST_C_CORE_EN | \
ROGUE_CR_SOFT_RESET_DUST_D_CORE_EN | \
ROGUE_CR_SOFT_RESET_DUST_E_CORE_EN | \
ROGUE_CR_SOFT_RESET_DUST_F_CORE_EN | \
ROGUE_CR_SOFT_RESET_DUST_G_CORE_EN | \
ROGUE_CR_SOFT_RESET_DUST_H_CORE_EN)
/* SOFT_RESET Rascal and DUSTs bits */
#define ROGUE_CR_SOFT_RESET_RASCALDUSTS_EN \
(ROGUE_CR_SOFT_RESET_RASCAL_CORE_EN | \
ROGUE_CR_SOFT_RESET_DUST_n_CORE_EN)
/* SOFT_RESET steps as defined in the TRM */
#define ROGUE_S7_SOFT_RESET_DUSTS (ROGUE_CR_SOFT_RESET_DUST_n_CORE_EN)
#define ROGUE_S7_SOFT_RESET_JONES \
(ROGUE_CR_SOFT_RESET_PM_EN | ROGUE_CR_SOFT_RESET_VDM_EN | \
ROGUE_CR_SOFT_RESET_ISP_EN)
#define ROGUE_S7_SOFT_RESET_JONES_ALL \
(ROGUE_S7_SOFT_RESET_JONES | ROGUE_CR_SOFT_RESET_BIF_EN | \
ROGUE_CR_SOFT_RESET_SLC_EN | ROGUE_CR_SOFT_RESET_GARTEN_EN)
#define ROGUE_S7_SOFT_RESET2 \
(ROGUE_CR_SOFT_RESET2_BLACKPEARL_EN | ROGUE_CR_SOFT_RESET2_PIXEL_EN | \
ROGUE_CR_SOFT_RESET2_CDM_EN | ROGUE_CR_SOFT_RESET2_VERTEX_EN)
#define ROGUE_BIF_PM_PHYSICAL_PAGE_ALIGNSHIFT (12U)
#define ROGUE_BIF_PM_PHYSICAL_PAGE_SIZE \
BIT(ROGUE_BIF_PM_PHYSICAL_PAGE_ALIGNSHIFT)
#define ROGUE_BIF_PM_VIRTUAL_PAGE_ALIGNSHIFT (14U)
#define ROGUE_BIF_PM_VIRTUAL_PAGE_SIZE BIT(ROGUE_BIF_PM_VIRTUAL_PAGE_ALIGNSHIFT)
#define ROGUE_BIF_PM_FREELIST_BASE_ADDR_ALIGNSIZE (16U)
/*
* To get the number of required Dusts, divide the number of
* clusters by 2 and round up
*/
#define ROGUE_REQ_NUM_DUSTS(CLUSTERS) (((CLUSTERS) + 1U) / 2U)
/*
* To get the number of required Bernado/Phantom(s), divide
* the number of clusters by 4 and round up
*/
#define ROGUE_REQ_NUM_PHANTOMS(CLUSTERS) (((CLUSTERS) + 3U) / 4U)
#define ROGUE_REQ_NUM_BERNADOS(CLUSTERS) (((CLUSTERS) + 3U) / 4U)
#define ROGUE_REQ_NUM_BLACKPEARLS(CLUSTERS) (((CLUSTERS) + 3U) / 4U)
/*
* FW MMU contexts
*/
#define MMU_CONTEXT_MAPPING_FWPRIV (0x0) /* FW code/private data */
Annotation
- Immediate include surface: `pvr_rogue_cr_defs.h`, `linux/bits.h`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.