drivers/gpu/drm/imx/dc/dc-fw.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/imx/dc/dc-fw.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/imx/dc/dc-fw.c
Extension
.c
Size
6079 bytes
Lines
223
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct dc_fw {
	struct dc_fu fu;
};

static const struct dc_subdev_info dc_fw_info[] = {
	{ .reg_start = 0x56180a60, .id = 2, },
};

static const struct regmap_range dc_fw_pec_regmap_access_ranges[] = {
	regmap_reg_range(PIXENGCFG_DYNAMIC, PIXENGCFG_DYNAMIC),
};

static const struct regmap_access_table dc_fw_pec_regmap_access_table = {
	.yes_ranges = dc_fw_pec_regmap_access_ranges,
	.n_yes_ranges = ARRAY_SIZE(dc_fw_pec_regmap_access_ranges),
};

static const struct regmap_config dc_fw_pec_regmap_config = {
	.name = "pec",
	.reg_bits = 32,
	.reg_stride = 4,
	.val_bits = 32,
	.fast_io = true,
	.wr_table = &dc_fw_pec_regmap_access_table,
	.rd_table = &dc_fw_pec_regmap_access_table,
	.max_register = PIXENGCFG_DYNAMIC,
};

static const struct regmap_range dc_fw_regmap_ranges[] = {
	regmap_reg_range(STATICCONTROL, FRAMEDIMENSIONS),
	regmap_reg_range(CONTROL, CONTROL),
};

static const struct regmap_access_table dc_fw_regmap_access_table = {
	.yes_ranges = dc_fw_regmap_ranges,
	.n_yes_ranges = ARRAY_SIZE(dc_fw_regmap_ranges),
};

static const struct regmap_config dc_fw_cfg_regmap_config = {
	.name = "cfg",
	.reg_bits = 32,
	.reg_stride = 4,
	.val_bits = 32,
	.fast_io = true,
	.wr_table = &dc_fw_regmap_access_table,
	.rd_table = &dc_fw_regmap_access_table,
	.max_register = CONTROL,
};

static void dc_fw_set_fmt(struct dc_fu *fu, enum dc_fu_frac frac,
			  const struct drm_format_info *format)
{
	u32 bits = 0, shifts = 0;

	dc_fu_set_src_bpp(fu, frac, format->cpp[0] * 8);

	regmap_write_bits(fu->reg_cfg, CONTROL, INPUTSELECT_MASK,
			  INPUTSELECT(INPUTSELECT_INACTIVE));
	regmap_write_bits(fu->reg_cfg, CONTROL, RASTERMODE_MASK,
			  RASTERMODE(RASTERMODE_NORMAL));

	regmap_write_bits(fu->reg_cfg, LAYERPROPERTY(frac),
			  YUVCONVERSIONMODE_MASK,
			  YUVCONVERSIONMODE(YUVCONVERSIONMODE_OFF));

	dc_fu_get_pixel_format_bits(fu, format->format, &bits);
	dc_fu_get_pixel_format_shifts(fu, format->format, &shifts);

	regmap_write(fu->reg_cfg, COLORCOMPONENTBITS(frac), bits);
	regmap_write(fu->reg_cfg, COLORCOMPONENTSHIFT(frac), shifts);
}

static void dc_fw_set_framedimensions(struct dc_fu *fu, int w, int h)
{
	regmap_write(fu->reg_cfg, FRAMEDIMENSIONS,
		     FRAMEWIDTH(w) | FRAMEHEIGHT(h));
}

static void dc_fw_init(struct dc_fu *fu)
{
	regmap_write(fu->reg_pec, PIXENGCFG_DYNAMIC, LINK_ID_NONE);
	dc_fu_common_hw_init(fu);
	dc_fu_shdldreq_sticky(fu, 0xff);
}

static void dc_fw_set_ops(struct dc_fu *fu)
{
	memcpy(&fu->ops, &dc_fu_common_ops, sizeof(dc_fu_common_ops));
	fu->ops.init = dc_fw_init;
	fu->ops.set_fmt	= dc_fw_set_fmt;

Annotation

Implementation Notes