drivers/gpu/drm/imx/dc/dc-pe.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/imx/dc/dc-pe.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/imx/dc/dc-pe.c- Extension
.c- Size
- 3484 bytes
- Lines
- 159
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/clk.hlinux/component.hlinux/mod_devicetable.hlinux/module.hlinux/of.hlinux/of_platform.hlinux/platform_device.hlinux/pm.hlinux/pm_runtime.hdc-drv.hdc-fu.hdc-pe.h
Detected Declarations
function dc_pe_bindfunction dc_pe_post_bindfunction dc_pe_probefunction dc_pe_removefunction dc_pe_runtime_suspendfunction dc_pe_runtime_resume
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2024 NXP
*/
#include <linux/clk.h>
#include <linux/component.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_platform.h>
#include <linux/platform_device.h>
#include <linux/pm.h>
#include <linux/pm_runtime.h>
#include "dc-drv.h"
#include "dc-fu.h"
#include "dc-pe.h"
static int dc_pe_bind(struct device *dev, struct device *master, void *data)
{
struct dc_drm_device *dc_drm = data;
struct dc_pe *pe;
int ret;
pe = devm_kzalloc(dev, sizeof(*pe), GFP_KERNEL);
if (!pe)
return -ENOMEM;
pe->clk_axi = devm_clk_get(dev, NULL);
if (IS_ERR(pe->clk_axi))
return dev_err_probe(dev, PTR_ERR(pe->clk_axi),
"failed to get AXI clock\n");
pe->dev = dev;
dev_set_drvdata(dev, pe);
ret = devm_pm_runtime_enable(dev);
if (ret)
return ret;
dc_drm->pe = pe;
return 0;
}
/*
* It's possible to get the child device pointers from the child component
* bind callbacks, but it depends on the component helper behavior to bind
* the pixel engine component first. To avoid the dependency, post bind to
* get the pointers from dc_drm in a safe manner.
*/
void dc_pe_post_bind(struct dc_drm_device *dc_drm)
{
struct dc_pe *pe = dc_drm->pe;
int i;
for (i = 0; i < DC_DISPLAYS; i++) {
pe->cf_safe[i] = dc_drm->cf_safe[i];
pe->cf_cont[i] = dc_drm->cf_cont[i];
pe->ed_safe[i] = dc_drm->ed_safe[i];
pe->ed_cont[i] = dc_drm->ed_cont[i];
}
for (i = 0; i < DC_DISP_FU_CNT; i++)
pe->fu_disp[i] = dc_drm->fu_disp[i];
for (i = 0; i < DC_LB_CNT; i++)
pe->lb[i] = dc_drm->lb[i];
}
static const struct component_ops dc_pe_ops = {
.bind = dc_pe_bind,
};
static int dc_pe_probe(struct platform_device *pdev)
{
int ret;
ret = devm_of_platform_populate(&pdev->dev);
if (ret < 0)
return ret;
ret = component_add(&pdev->dev, &dc_pe_ops);
if (ret)
return dev_err_probe(&pdev->dev, ret,
"failed to add component\n");
return 0;
Annotation
- Immediate include surface: `linux/clk.h`, `linux/component.h`, `linux/mod_devicetable.h`, `linux/module.h`, `linux/of.h`, `linux/of_platform.h`, `linux/platform_device.h`, `linux/pm.h`.
- Detected declarations: `function dc_pe_bind`, `function dc_pe_post_bind`, `function dc_pe_probe`, `function dc_pe_remove`, `function dc_pe_runtime_suspend`, `function dc_pe_runtime_resume`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.