drivers/gpu/drm/ingenic/ingenic-ipu.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/ingenic/ingenic-ipu.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/ingenic/ingenic-ipu.c- Extension
.c- Size
- 28530 bytes
- Lines
- 1002
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
ingenic-drm.hingenic-ipu.hlinux/clk.hlinux/component.hlinux/gcd.hlinux/interrupt.hlinux/module.hlinux/of.hlinux/platform_device.hlinux/regmap.hlinux/time.hdrm/drm_atomic.hdrm/drm_atomic_helper.hdrm/drm_damage_helper.hdrm/drm_drv.hdrm/drm_fb_dma_helper.hdrm/drm_fourcc.hdrm/drm_framebuffer.hdrm/drm_gem_atomic_helper.hdrm/drm_gem_dma_helper.hdrm/drm_gem_framebuffer_helper.hdrm/drm_plane.hdrm/drm_property.hdrm/drm_vblank.h
Detected Declarations
struct ingenic_ipustruct soc_infostruct ingenic_ipu_private_statestruct ingenic_ipufunction to_ingenic_ipu_priv_statefunction ingenic_ipu_get_priv_statefunction ingenic_ipu_get_new_priv_statefunction horizontalfunction jz4760_set_coefsfunction jz4725b_set_coefsfunction ingenic_ipu_set_downscale_coefsfunction ingenic_ipu_set_integer_upscale_coefsfunction ingenic_ipu_set_upscale_coefsfunction ingenic_ipu_set_coefsfunction reduce_fractionfunction osd_changedfunction ingenic_ipu_plane_atomic_updatefunction ingenic_ipu_plane_atomic_checkfunction ingenic_ipu_plane_atomic_disablefunction ingenic_ipu_plane_atomic_get_propertyfunction ingenic_ipu_plane_atomic_set_propertyfunction ingenic_ipu_duplicate_statefunction ingenic_ipu_destroy_statefunction ingenic_ipu_create_statefunction ingenic_ipu_irq_handlerfunction ingenic_ipu_bindfunction ingenic_ipu_unbindfunction ingenic_ipu_probefunction ingenic_ipu_remove
Annotated Snippet
struct soc_info {
const u32 *formats;
size_t num_formats;
bool has_bicubic;
bool manual_restart;
void (*set_coefs)(struct ingenic_ipu *ipu, unsigned int reg,
unsigned int sharpness, bool downscale,
unsigned int weight, unsigned int offset);
};
struct ingenic_ipu_private_state {
struct drm_private_state base;
unsigned int num_w, num_h, denom_w, denom_h;
};
struct ingenic_ipu {
struct drm_plane plane;
struct drm_device *drm;
struct device *dev, *master;
struct regmap *map;
struct clk *clk;
const struct soc_info *soc_info;
bool clk_enabled;
dma_addr_t addr_y, addr_u, addr_v;
struct drm_property *sharpness_prop;
unsigned int sharpness;
struct drm_private_obj private_obj;
};
/* Signed 15.16 fixed-point math (for bicubic scaling coefficients) */
#define I2F(i) ((s32)(i) * 65536)
#define F2I(f) ((f) / 65536)
#define FMUL(fa, fb) ((s32)(((s64)(fa) * (s64)(fb)) / 65536))
#define SHARPNESS_INCR (I2F(-1) / 8)
static inline struct ingenic_ipu *plane_to_ingenic_ipu(struct drm_plane *plane)
{
return container_of(plane, struct ingenic_ipu, plane);
}
static inline struct ingenic_ipu_private_state *
to_ingenic_ipu_priv_state(struct drm_private_state *state)
{
return container_of(state, struct ingenic_ipu_private_state, base);
}
static struct ingenic_ipu_private_state *
ingenic_ipu_get_priv_state(struct ingenic_ipu *priv, struct drm_atomic_commit *state)
{
struct drm_private_state *priv_state;
priv_state = drm_atomic_get_private_obj_state(state, &priv->private_obj);
if (IS_ERR(priv_state))
return ERR_CAST(priv_state);
return to_ingenic_ipu_priv_state(priv_state);
}
static struct ingenic_ipu_private_state *
ingenic_ipu_get_new_priv_state(struct ingenic_ipu *priv, struct drm_atomic_commit *state)
{
struct drm_private_state *priv_state;
priv_state = drm_atomic_get_new_private_obj_state(state, &priv->private_obj);
if (!priv_state)
return NULL;
return to_ingenic_ipu_priv_state(priv_state);
}
/*
* Apply conventional cubic convolution kernel. Both parameters
* and return value are 15.16 signed fixed-point.
*
* @f_a: Sharpness factor, typically in range [-4.0, -0.25].
* A larger magnitude increases perceived sharpness, but going past
* -2.0 might cause ringing artifacts to outweigh any improvement.
* Nice values on a 320x240 LCD are between -0.75 and -2.0.
*
* @f_x: Absolute distance in pixels from 'pixel 0' sample position
* along horizontal (or vertical) source axis. Range is [0, +2.0].
*
* returns: Weight of this pixel within 4-pixel sample group. Range is
* [-2.0, +2.0]. For moderate (i.e. > -3.0) sharpness factors,
* range is within [-1.0, +1.0].
Annotation
- Immediate include surface: `ingenic-drm.h`, `ingenic-ipu.h`, `linux/clk.h`, `linux/component.h`, `linux/gcd.h`, `linux/interrupt.h`, `linux/module.h`, `linux/of.h`.
- Detected declarations: `struct ingenic_ipu`, `struct soc_info`, `struct ingenic_ipu_private_state`, `struct ingenic_ipu`, `function to_ingenic_ipu_priv_state`, `function ingenic_ipu_get_priv_state`, `function ingenic_ipu_get_new_priv_state`, `function horizontal`, `function jz4760_set_coefs`, `function jz4725b_set_coefs`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.