drivers/gpu/drm/kmb/kmb_dsi.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/kmb/kmb_dsi.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/kmb/kmb_dsi.h- Extension
.h- Size
- 9501 bytes
- Lines
- 388
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
drm/drm_encoder.hdrm/drm_mipi_dsi.h
Detected Declarations
struct kmb_dsistruct mipi_data_type_paramsstruct mipi_tx_dsi_cfgstruct mipi_tx_frame_section_cfgstruct mipi_tx_frame_timing_cfgstruct mipi_tx_frame_sect_phcfgstruct mipi_tx_frame_cfgstruct mipi_tx_ctrl_cfgstruct mipi_ctrl_cfgenum mipi_ctrl_numenum mipi_dphy_numenum mipi_direnum mipi_ctrl_typeenum mipi_data_ifenum mipi_data_modeenum mipi_dsi_video_modeenum mipi_dsi_blanking_modeenum mipi_dsi_eotpenum mipi_dsi_data_typeenum mipi_tx_hs_tp_selenum dphy_modeenum dphy_tx_fsmfunction kmb_write_mipifunction kmb_read_mipifunction kmb_write_bits_mipifunction kmb_set_bit_mipifunction kmb_clr_bit_mipi
Annotated Snippet
struct kmb_dsi {
struct drm_encoder base;
struct device *dev;
struct platform_device *pdev;
struct mipi_dsi_host *host;
struct mipi_dsi_device *device;
struct drm_bridge *adv_bridge;
void __iomem *mipi_mmio;
struct clk *clk_mipi;
struct clk *clk_mipi_ecfg;
struct clk *clk_mipi_cfg;
int sys_clk_mhz;
};
/* DPHY Tx test codes */
enum mipi_ctrl_num {
MIPI_CTRL0 = 0,
MIPI_CTRL1,
MIPI_CTRL2,
MIPI_CTRL3,
MIPI_CTRL4,
MIPI_CTRL5,
MIPI_CTRL6,
MIPI_CTRL7,
MIPI_CTRL8,
MIPI_CTRL9,
MIPI_CTRL_NA
};
enum mipi_dphy_num {
MIPI_DPHY0 = 0,
MIPI_DPHY1,
MIPI_DPHY2,
MIPI_DPHY3,
MIPI_DPHY4,
MIPI_DPHY5,
MIPI_DPHY6,
MIPI_DPHY7,
MIPI_DPHY8,
MIPI_DPHY9,
MIPI_DPHY_NA
};
enum mipi_dir {
MIPI_RX,
MIPI_TX
};
enum mipi_ctrl_type {
MIPI_DSI,
MIPI_CSI
};
enum mipi_data_if {
MIPI_IF_DMA,
MIPI_IF_PARALLEL
};
enum mipi_data_mode {
MIPI_DATA_MODE0,
MIPI_DATA_MODE1,
MIPI_DATA_MODE2,
MIPI_DATA_MODE3
};
enum mipi_dsi_video_mode {
DSI_VIDEO_MODE_NO_BURST_PULSE,
DSI_VIDEO_MODE_NO_BURST_EVENT,
DSI_VIDEO_MODE_BURST
};
enum mipi_dsi_blanking_mode {
TRANSITION_TO_LOW_POWER,
SEND_BLANK_PACKET
};
enum mipi_dsi_eotp {
DSI_EOTP_DISABLED,
DSI_EOTP_ENABLES
};
enum mipi_dsi_data_type {
DSI_SP_DT_RESERVED_00 = 0x00,
DSI_SP_DT_VSYNC_START = 0x01,
DSI_SP_DT_COLOR_MODE_OFF = 0x02,
DSI_SP_DT_GENERIC_SHORT_WR = 0x03,
DSI_SP_DT_GENERIC_RD = 0x04,
DSI_SP_DT_DCS_SHORT_WR = 0x05,
DSI_SP_DT_DCS_RD = 0x06,
Annotation
- Immediate include surface: `drm/drm_encoder.h`, `drm/drm_mipi_dsi.h`.
- Detected declarations: `struct kmb_dsi`, `struct mipi_data_type_params`, `struct mipi_tx_dsi_cfg`, `struct mipi_tx_frame_section_cfg`, `struct mipi_tx_frame_timing_cfg`, `struct mipi_tx_frame_sect_phcfg`, `struct mipi_tx_frame_cfg`, `struct mipi_tx_ctrl_cfg`, `struct mipi_ctrl_cfg`, `enum mipi_ctrl_num`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.