drivers/gpu/drm/lima/lima_gem.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/lima/lima_gem.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/lima/lima_gem.c- Extension
.c- Size
- 9303 bytes
- Lines
- 417
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/mm.hlinux/iosys-map.hlinux/sync_file.hlinux/pagemap.hlinux/shmem_fs.hlinux/dma-mapping.hdrm/drm_file.hdrm/drm_syncobj.hdrm/drm_utils.hdrm/lima_drm.hlima_drv.hlima_gem.hlima_vm.h
Detected Declarations
function lima_heap_allocfunction lima_gem_create_handlefunction lima_gem_free_objectfunction lima_gem_object_openfunction lima_gem_object_closefunction lima_gem_pinfunction lima_gem_vmapfunction lima_gem_mmapfunction lima_gem_get_infofunction lima_gem_sync_bofunction lima_gem_add_depsfunction lima_gem_submitfunction lima_gem_wait
Annotated Snippet
if (!pages) {
dma_resv_unlock(bo->base.base.resv);
return -ENOMEM;
}
bo->base.pages = pages;
refcount_set(&bo->base.pages_use_count, 1);
mapping_set_unevictable(mapping);
}
for (i = old_size >> PAGE_SHIFT; i < new_size >> PAGE_SHIFT; i++) {
struct page *page = shmem_read_mapping_page(mapping, i);
if (IS_ERR(page)) {
dma_resv_unlock(bo->base.base.resv);
return PTR_ERR(page);
}
pages[i] = page;
}
dma_resv_unlock(bo->base.base.resv);
ret = sg_alloc_table_from_pages(&sgt, pages, i, 0,
new_size, GFP_KERNEL);
if (ret)
return ret;
if (bo->base.sgt) {
dma_unmap_sgtable(dev, bo->base.sgt, DMA_BIDIRECTIONAL, 0);
sg_free_table(bo->base.sgt);
} else {
bo->base.sgt = kmalloc_obj(*bo->base.sgt);
if (!bo->base.sgt) {
ret = -ENOMEM;
goto err_out0;
}
}
ret = dma_map_sgtable(dev, &sgt, DMA_BIDIRECTIONAL, 0);
if (ret)
goto err_out1;
*bo->base.sgt = sgt;
if (vm) {
ret = lima_vm_map_bo(vm, bo, old_size >> PAGE_SHIFT);
if (ret)
goto err_out2;
}
bo->heap_size = new_size;
return 0;
err_out2:
dma_unmap_sgtable(dev, &sgt, DMA_BIDIRECTIONAL, 0);
err_out1:
kfree(bo->base.sgt);
bo->base.sgt = NULL;
err_out0:
sg_free_table(&sgt);
return ret;
}
int lima_gem_create_handle(struct drm_device *dev, struct drm_file *file,
u32 size, u32 flags, u32 *handle)
{
int err;
gfp_t mask;
struct drm_gem_shmem_object *shmem;
struct drm_gem_object *obj;
struct lima_bo *bo;
bool is_heap = flags & LIMA_BO_FLAG_HEAP;
shmem = drm_gem_shmem_create(dev, size);
if (IS_ERR(shmem))
return PTR_ERR(shmem);
obj = &shmem->base;
/* Mali Utgard GPU can only support 32bit address space */
mask = mapping_gfp_mask(obj->filp->f_mapping);
mask &= ~__GFP_HIGHMEM;
mask |= __GFP_DMA32;
mapping_set_gfp_mask(obj->filp->f_mapping, mask);
if (is_heap) {
bo = to_lima_bo(obj);
err = lima_heap_alloc(bo, NULL);
if (err)
Annotation
- Immediate include surface: `linux/mm.h`, `linux/iosys-map.h`, `linux/sync_file.h`, `linux/pagemap.h`, `linux/shmem_fs.h`, `linux/dma-mapping.h`, `drm/drm_file.h`, `drm/drm_syncobj.h`.
- Detected declarations: `function lima_heap_alloc`, `function lima_gem_create_handle`, `function lima_gem_free_object`, `function lima_gem_object_open`, `function lima_gem_object_close`, `function lima_gem_pin`, `function lima_gem_vmap`, `function lima_gem_mmap`, `function lima_gem_get_info`, `function lima_gem_sync_bo`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.