drivers/gpu/drm/mediatek/mtk_dpi_regs.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/mediatek/mtk_dpi_regs.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/mediatek/mtk_dpi_regs.h- Extension
.h- Size
- 6402 bytes
- Lines
- 248
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef __MTK_DPI_REGS_H
#define __MTK_DPI_REGS_H
#define DPI_EN 0x00
#define EN BIT(0)
#define DPI_RET 0x04
#define RST BIT(0)
#define DPI_INTEN 0x08
#define INT_VSYNC_EN BIT(0)
#define INT_VDE_EN BIT(1)
#define INT_UNDERFLOW_EN BIT(2)
#define DPI_INTSTA 0x0C
#define INT_VSYNC_STA BIT(0)
#define INT_VDE_STA BIT(1)
#define INT_UNDERFLOW_STA BIT(2)
#define DPI_CON 0x10
#define BG_ENABLE BIT(0)
#define IN_RB_SWAP BIT(1)
#define INTL_EN BIT(2)
#define TDFP_EN BIT(3)
#define CLPF_EN BIT(4)
#define YUV422_EN BIT(5)
#define CSC_ENABLE BIT(6)
#define R601_SEL BIT(7)
#define EMBSYNC_EN BIT(8)
#define VS_LODD_EN BIT(16)
#define VS_LEVEN_EN BIT(17)
#define VS_RODD_EN BIT(18)
#define VS_REVEN BIT(19)
#define FAKE_DE_LODD BIT(20)
#define FAKE_DE_LEVEN BIT(21)
#define FAKE_DE_RODD BIT(22)
#define FAKE_DE_REVEN BIT(23)
/* DPI_CON: DPI instances */
#define DPI_OUTPUT_1T1P_EN BIT(24)
#define DPI_INPUT_2P_EN BIT(25)
/* DPI_CON: DPINTF instances */
#define DPINTF_YUV422_EN BIT(24)
#define DPINTF_CSC_ENABLE BIT(26)
#define DPINTF_INPUT_2P_EN BIT(29)
#define DPI_OUTPUT_SETTING 0x14
#define CH_SWAP 0
#define DPINTF_CH_SWAP 1
#define CH_SWAP_MASK (0x7 << 0)
#define SWAP_RGB 0x00
#define SWAP_GBR 0x01
#define SWAP_BRG 0x02
#define SWAP_RBG 0x03
#define SWAP_GRB 0x04
#define SWAP_BGR 0x05
#define BIT_SWAP BIT(3)
#define B_MASK BIT(4)
#define G_MASK BIT(5)
#define R_MASK BIT(6)
#define DE_MASK BIT(8)
#define HS_MASK BIT(9)
#define VS_MASK BIT(10)
#define DE_POL BIT(12)
#define HSYNC_POL BIT(13)
#define VSYNC_POL BIT(14)
#define CK_POL BIT(15)
#define OEN_OFF BIT(16)
#define EDGE_SEL BIT(17)
#define OUT_BIT 18
#define OUT_BIT_MASK (0x3 << 18)
#define OUT_BIT_8 0x00
#define OUT_BIT_10 0x01
#define OUT_BIT_12 0x02
#define OUT_BIT_16 0x03
#define YC_MAP 20
#define YC_MAP_MASK (0x7 << 20)
#define YC_MAP_RGB 0x00
#define YC_MAP_CYCY 0x04
#define YC_MAP_YCYC 0x05
#define YC_MAP_CY 0x06
#define YC_MAP_YC 0x07
#define DPI_SIZE 0x18
#define HSIZE 0
#define HSIZE_MASK (0x1FFF << 0)
#define DPINTF_HSIZE_MASK (0xFFFF << 0)
#define VSIZE 16
#define VSIZE_MASK (0x1FFF << 16)
#define DPINTF_VSIZE_MASK (0xFFFF << 16)
Annotation
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.