drivers/gpu/drm/mediatek/mtk_hdmi_regs_v2.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/mediatek/mtk_hdmi_regs_v2.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/mediatek/mtk_hdmi_regs_v2.h- Extension
.h- Size
- 8096 bytes
- Lines
- 264
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
enum mtk_hdmi_ddc_v2_cmds
Annotated Snippet
#ifndef _MTK_HDMI_REGS_H
#define _MTK_HDMI_REGS_H
/* HDMI_TOP Config */
#define TOP_CFG00 0x000
#define HDMI2_ON BIT(2)
#define HDMI_MODE_HDMI BIT(3)
#define SCR_ON BIT(4)
#define TMDS_PACK_MODE GENMASK(9, 8)
#define TMDS_PACK_MODE_8BPP 0
#define TMDS_PACK_MODE_10BPP 1
#define TMDS_PACK_MODE_12BPP 2
#define TMDS_PACK_MODE_16BPP 3
#define DEEPCOLOR_PKT_EN BIT(12)
#define HDMI_ABIST_VIDEO_FORMAT GENMASK(21, 16)
#define HDMI_ABIST_ENABLE BIT(31)
#define TOP_CFG01 0x004
#define CP_SET_MUTE_EN BIT(0)
#define CP_CLR_MUTE_EN BIT(1)
#define NULL_PKT_EN BIT(2)
#define NULL_PKT_VSYNC_HIGH_EN BIT(3)
/* HDMI_TOP Audio: Channel Mapping */
#define TOP_AUD_MAP 0x00c
#define SD0_MAP GENMASK(2, 0)
#define SD1_MAP GENMASK(6, 4)
#define SD2_MAP GENMASK(10, 8)
#define SD3_MAP GENMASK(14, 12)
#define SD4_MAP GENMASK(18, 16)
#define SD5_MAP GENMASK(22, 20)
#define SD6_MAP GENMASK(26, 24)
#define SD7_MAP GENMASK(30, 28)
/* Auxiliary Video Information (AVI) Infoframe */
#define TOP_AVI_HEADER 0x024
#define TOP_AVI_PKT00 0x028
#define TOP_AVI_PKT01 0x02C
#define TOP_AVI_PKT02 0x030
#define TOP_AVI_PKT03 0x034
#define TOP_AVI_PKT04 0x038
#define TOP_AVI_PKT05 0x03C
/* Audio Interface Infoframe */
#define TOP_AIF_HEADER 0x040
#define TOP_AIF_PKT00 0x044
#define TOP_AIF_PKT01 0x048
#define TOP_AIF_PKT02 0x04c
#define TOP_AIF_PKT03 0x050
/* Audio SPDIF Infoframe */
#define TOP_SPDIF_HEADER 0x054
#define TOP_SPDIF_PKT00 0x058
#define TOP_SPDIF_PKT01 0x05c
#define TOP_SPDIF_PKT02 0x060
#define TOP_SPDIF_PKT03 0x064
#define TOP_SPDIF_PKT04 0x068
#define TOP_SPDIF_PKT05 0x06c
#define TOP_SPDIF_PKT06 0x070
#define TOP_SPDIF_PKT07 0x074
/* Infoframes Configuration */
#define TOP_INFO_EN 0x01c
#define AVI_EN BIT(0)
#define SPD_EN BIT(1)
#define AUD_EN BIT(2)
#define CP_EN BIT(5)
#define VSIF_EN BIT(11)
#define AVI_EN_WR BIT(16)
#define SPD_EN_WR BIT(17)
#define AUD_EN_WR BIT(18)
#define CP_EN_WR BIT(21)
#define VSIF_EN_WR BIT(27)
#define TOP_INFO_RPT 0x020
#define AVI_RPT_EN BIT(0)
#define SPD_RPT_EN BIT(1)
#define AUD_RPT_EN BIT(2)
#define CP_RPT_EN BIT(5)
#define VSIF_RPT_EN BIT(11)
/* Vendor Specific Infoframe */
#define TOP_VSIF_HEADER 0x174
#define TOP_VSIF_PKT00 0x178
#define TOP_VSIF_PKT01 0x17c
#define TOP_VSIF_PKT02 0x180
#define TOP_VSIF_PKT03 0x184
#define TOP_VSIF_PKT04 0x188
#define TOP_VSIF_PKT05 0x18c
#define TOP_VSIF_PKT06 0x190
#define TOP_VSIF_PKT07 0x194
Annotation
- Detected declarations: `enum mtk_hdmi_ddc_v2_cmds`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.