drivers/gpu/drm/mgag200/mgag200_ddc.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/mgag200/mgag200_ddc.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/mgag200/mgag200_ddc.c- Extension
.c- Size
- 4699 bytes
- Lines
- 179
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/i2c-algo-bit.hlinux/i2c.hlinux/pci.hdrm/drm_managed.hmgag200_ddc.hmgag200_drv.h
Detected Declarations
struct mgag200_ddcfunction mga_i2c_read_gpiofunction mga_i2c_set_gpiofunction mga_i2c_setfunction mgag200_ddc_algo_bit_data_setsdafunction mgag200_ddc_algo_bit_data_setsclfunction mgag200_ddc_algo_bit_data_getsdafunction mgag200_ddc_algo_bit_data_getsclfunction mgag200_ddc_algo_bit_data_pre_xferfunction mgag200_ddc_algo_bit_data_post_xferfunction mgag200_ddc_release
Annotated Snippet
struct mgag200_ddc {
struct mga_device *mdev;
int data;
int clock;
struct i2c_algo_bit_data bit;
struct i2c_adapter adapter;
};
static int mga_i2c_read_gpio(struct mga_device *mdev)
{
WREG8(DAC_INDEX, MGA1064_GEN_IO_DATA);
return RREG8(DAC_DATA);
}
static void mga_i2c_set_gpio(struct mga_device *mdev, int mask, int val)
{
int tmp;
WREG8(DAC_INDEX, MGA1064_GEN_IO_CTL);
tmp = (RREG8(DAC_DATA) & mask) | val;
WREG_DAC(MGA1064_GEN_IO_CTL, tmp);
WREG_DAC(MGA1064_GEN_IO_DATA, 0);
}
static inline void mga_i2c_set(struct mga_device *mdev, int mask, int state)
{
if (state)
state = 0;
else
state = mask;
mga_i2c_set_gpio(mdev, ~mask, state);
}
static void mgag200_ddc_algo_bit_data_setsda(void *data, int state)
{
struct mgag200_ddc *ddc = data;
mga_i2c_set(ddc->mdev, ddc->data, state);
}
static void mgag200_ddc_algo_bit_data_setscl(void *data, int state)
{
struct mgag200_ddc *ddc = data;
mga_i2c_set(ddc->mdev, ddc->clock, state);
}
static int mgag200_ddc_algo_bit_data_getsda(void *data)
{
struct mgag200_ddc *ddc = data;
return (mga_i2c_read_gpio(ddc->mdev) & ddc->data) ? 1 : 0;
}
static int mgag200_ddc_algo_bit_data_getscl(void *data)
{
struct mgag200_ddc *ddc = data;
return (mga_i2c_read_gpio(ddc->mdev) & ddc->clock) ? 1 : 0;
}
static int mgag200_ddc_algo_bit_data_pre_xfer(struct i2c_adapter *adapter)
{
struct mgag200_ddc *ddc = i2c_get_adapdata(adapter);
struct mga_device *mdev = ddc->mdev;
/*
* Protect access to I/O registers from concurrent modesetting
* by acquiring the I/O-register lock.
*/
mutex_lock(&mdev->rmmio_lock);
return 0;
}
static void mgag200_ddc_algo_bit_data_post_xfer(struct i2c_adapter *adapter)
{
struct mgag200_ddc *ddc = i2c_get_adapdata(adapter);
struct mga_device *mdev = ddc->mdev;
mutex_unlock(&mdev->rmmio_lock);
}
static void mgag200_ddc_release(struct drm_device *dev, void *res)
{
struct mgag200_ddc *ddc = res;
i2c_del_adapter(&ddc->adapter);
Annotation
- Immediate include surface: `linux/i2c-algo-bit.h`, `linux/i2c.h`, `linux/pci.h`, `drm/drm_managed.h`, `mgag200_ddc.h`, `mgag200_drv.h`.
- Detected declarations: `struct mgag200_ddc`, `function mga_i2c_read_gpio`, `function mga_i2c_set_gpio`, `function mga_i2c_set`, `function mgag200_ddc_algo_bit_data_setsda`, `function mgag200_ddc_algo_bit_data_setscl`, `function mgag200_ddc_algo_bit_data_getsda`, `function mgag200_ddc_algo_bit_data_getscl`, `function mgag200_ddc_algo_bit_data_pre_xfer`, `function mgag200_ddc_algo_bit_data_post_xfer`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.