drivers/gpu/drm/mgag200/mgag200_drv.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/mgag200/mgag200_drv.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/mgag200/mgag200_drv.h- Extension
.h- Size
- 13516 bytes
- Lines
- 440
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
video/vga.hdrm/drm_connector.hdrm/drm_crtc.hdrm/drm_encoder.hdrm/drm_gem.hdrm/drm_gem_shmem_helper.hdrm/drm_plane.hmgag200_reg.h
Detected Declarations
struct mga_devicestruct mgag200_pll_valuesstruct mgag200_crtc_statestruct mgag200_device_infostruct mgag200_device_funcsstruct mga_devicestruct mgag200_g200_devicestruct mgag200_g200se_devicestruct drm_crtcstruct drm_crtc_statestruct drm_display_modestruct drm_planestruct drm_atomic_commitstruct drm_scanout_bufferenum mga_type
Annotated Snippet
struct mgag200_pll_values {
unsigned int m;
unsigned int n;
unsigned int p;
unsigned int s;
};
struct mgag200_crtc_state {
struct drm_crtc_state base;
/* Primary-plane format; required for modesetting and color mgmt. */
const struct drm_format_info *format;
struct mgag200_pll_values pixpllc;
bool set_vidrst;
};
static inline struct mgag200_crtc_state *to_mgag200_crtc_state(struct drm_crtc_state *base)
{
return container_of(base, struct mgag200_crtc_state, base);
}
enum mga_type {
G200_PCI,
G200_AGP,
G200_SE_A,
G200_SE_B,
G200_WB,
G200_EV,
G200_EH,
G200_EH3,
G200_EH5,
G200_ER,
G200_EW3,
};
struct mgag200_device_info {
u16 max_hdisplay;
u16 max_vdisplay;
/*
* Maximum memory bandwidth (MiB/sec). Setting this to zero disables
* the rsp test during mode validation.
*/
unsigned long max_mem_bandwidth;
/* Synchronize scanout with BMC */
bool sync_bmc:1;
struct {
unsigned data_bit:3;
unsigned clock_bit:3;
} i2c;
/*
* HW does not handle 'startadd' register correctly. Always set
* it's value to 0.
*/
bool bug_no_startadd:1;
};
#define MGAG200_DEVICE_INFO_INIT(_max_hdisplay, _max_vdisplay, _max_mem_bandwidth, \
_sync_bmc, _i2c_data_bit, _i2c_clock_bit, \
_bug_no_startadd) \
{ \
.max_hdisplay = (_max_hdisplay), \
.max_vdisplay = (_max_vdisplay), \
.max_mem_bandwidth = (_max_mem_bandwidth), \
.sync_bmc = (_sync_bmc), \
.i2c = { \
.data_bit = (_i2c_data_bit), \
.clock_bit = (_i2c_clock_bit), \
}, \
.bug_no_startadd = (_bug_no_startadd), \
}
struct mgag200_device_funcs {
/*
* Validate that the given state can be programmed into PIXPLLC. On
* success, the calculated parameters should be stored in the CRTC's
* state in struct @mgag200_crtc_state.pixpllc.
*/
int (*pixpllc_atomic_check)(struct drm_crtc *crtc, struct drm_atomic_commit *new_state);
/*
* Program PIXPLLC from the CRTC state. The parameters should have been
* stored in struct @mgag200_crtc_state.pixpllc by the corresponding
* implementation of @pixpllc_atomic_check.
*/
Annotation
- Immediate include surface: `video/vga.h`, `drm/drm_connector.h`, `drm/drm_crtc.h`, `drm/drm_encoder.h`, `drm/drm_gem.h`, `drm/drm_gem_shmem_helper.h`, `drm/drm_plane.h`, `mgag200_reg.h`.
- Detected declarations: `struct mga_device`, `struct mgag200_pll_values`, `struct mgag200_crtc_state`, `struct mgag200_device_info`, `struct mgag200_device_funcs`, `struct mga_device`, `struct mgag200_g200_device`, `struct mgag200_g200se_device`, `struct drm_crtc`, `struct drm_crtc_state`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.