drivers/gpu/drm/mgag200/mgag200_g200se.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/mgag200/mgag200_g200se.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/mgag200/mgag200_g200se.c- Extension
.c- Size
- 14296 bytes
- Lines
- 526
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/delay.hlinux/pci.hdrm/drm_atomic.hdrm/drm_atomic_helper.hdrm/drm_drv.hdrm/drm_gem_atomic_helper.hdrm/drm_print.hdrm/drm_probe_helper.hmgag200_drv.h
Detected Declarations
function mgag200_g200se_init_pci_optionsfunction mgag200_g200se_init_registersfunction mgag200_g200se_set_hiprilvlfunction mgag200_g200se_00_pixpllc_atomic_checkfunction mgag200_g200se_00_pixpllc_atomic_updatefunction mgag200_g200se_04_pixpllc_atomic_checkfunction mgag200_g200se_04_pixpllc_atomic_updatefunction mgag200_g200se_crtc_helper_atomic_enablefunction mgag200_g200se_pipeline_initfunction mgag200_g200se_init_unique_rev_id
Annotated Snippet
switch (format->format) {
case DRM_FORMAT_XRGB8888:
case DRM_FORMAT_RGB888:
bpp = 32;
break;
case DRM_FORMAT_RGB565:
case DRM_FORMAT_XRGB1555:
bpp = 16;
break;
case DRM_FORMAT_C8:
bpp = 8;
break;
}
mb = (mode->clock * bpp) / 1000;
if (mb > 3100)
hiprilvl = 0;
else if (mb > 2600)
hiprilvl = 1;
else if (mb > 1900)
hiprilvl = 2;
else if (mb > 1160)
hiprilvl = 3;
else if (mb > 440)
hiprilvl = 4;
else
hiprilvl = 5;
} else if (g200se->unique_rev_id >= 0x01) {
hiprilvl = 3;
} else {
hiprilvl = 4;
}
crtcext6 = hiprilvl; /* implicitly sets maxhipri to 0 */
WREG_ECRT(0x06, crtcext6);
}
/*
* PIXPLLC
*/
static int mgag200_g200se_00_pixpllc_atomic_check(struct drm_crtc *crtc,
struct drm_atomic_commit *new_state)
{
static const unsigned int vcomax = 320000;
static const unsigned int vcomin = 160000;
static const unsigned int pllreffreq = 25000;
struct drm_crtc_state *new_crtc_state = drm_atomic_get_new_crtc_state(new_state, crtc);
struct mgag200_crtc_state *new_mgag200_crtc_state = to_mgag200_crtc_state(new_crtc_state);
long clock = new_crtc_state->mode.clock;
struct mgag200_pll_values *pixpllc = &new_mgag200_crtc_state->pixpllc;
unsigned int delta, tmpdelta, permitteddelta;
unsigned int testp, testm, testn;
unsigned int p, m, n, s;
unsigned int computed;
m = n = p = s = 0;
delta = 0xffffffff;
permitteddelta = clock * 5 / 1000;
for (testp = 8; testp > 0; testp /= 2) {
if (clock * testp > vcomax)
continue;
if (clock * testp < vcomin)
continue;
for (testn = 17; testn < 256; testn++) {
for (testm = 1; testm < 32; testm++) {
computed = (pllreffreq * testn) / (testm * testp);
if (computed > clock)
tmpdelta = computed - clock;
else
tmpdelta = clock - computed;
if (tmpdelta < delta) {
delta = tmpdelta;
m = testm;
n = testn;
p = testp;
}
}
}
}
if (delta > permitteddelta) {
pr_warn("PLL delta too large\n");
return -EINVAL;
}
Annotation
- Immediate include surface: `linux/delay.h`, `linux/pci.h`, `drm/drm_atomic.h`, `drm/drm_atomic_helper.h`, `drm/drm_drv.h`, `drm/drm_gem_atomic_helper.h`, `drm/drm_print.h`, `drm/drm_probe_helper.h`.
- Detected declarations: `function mgag200_g200se_init_pci_options`, `function mgag200_g200se_init_registers`, `function mgag200_g200se_set_hiprilvl`, `function mgag200_g200se_00_pixpllc_atomic_check`, `function mgag200_g200se_00_pixpllc_atomic_update`, `function mgag200_g200se_04_pixpllc_atomic_check`, `function mgag200_g200se_04_pixpllc_atomic_update`, `function mgag200_g200se_crtc_helper_atomic_enable`, `function mgag200_g200se_pipeline_init`, `function mgag200_g200se_init_unique_rev_id`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.