drivers/gpu/drm/msm/adreno/a2xx_gpu.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/msm/adreno/a2xx_gpu.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/msm/adreno/a2xx_gpu.h- Extension
.h- Size
- 683 bytes
- Lines
- 29
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
adreno_gpu.ha2xx.xml.h
Detected Declarations
struct a2xx_gpu
Annotated Snippet
struct a2xx_gpu {
struct adreno_gpu base;
bool pm_enabled;
bool protection_disabled;
};
#define to_a2xx_gpu(x) container_of(x, struct a2xx_gpu, base)
extern const struct adreno_gpu_funcs a2xx_gpu_funcs;
struct msm_mmu *a2xx_gpummu_new(struct device *dev, struct msm_gpu *gpu);
void a2xx_gpummu_params(struct msm_mmu *mmu, dma_addr_t *pt_base,
dma_addr_t *tran_error);
#endif /* __A2XX_GPU_H__ */
Annotation
- Immediate include surface: `adreno_gpu.h`, `a2xx.xml.h`.
- Detected declarations: `struct a2xx_gpu`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.