drivers/gpu/drm/msm/adreno/adreno_gen7_0_0_snapshot.h

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/msm/adreno/adreno_gen7_0_0_snapshot.h

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/msm/adreno/adreno_gen7_0_0_snapshot.h
Extension
.h
Size
47717 bytes
Lines
936
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef __ADRENO_GEN7_0_0_SNAPSHOT_H
#define __ADRENO_GEN7_0_0_SNAPSHOT_H

#include "a6xx_gpu_state.h"

static const u32 gen7_0_0_debugbus_blocks[] = {
	A7XX_DBGBUS_CP_0_0,
	A7XX_DBGBUS_CP_0_1,
	A7XX_DBGBUS_RBBM,
	A7XX_DBGBUS_HLSQ,
	A7XX_DBGBUS_UCHE_0,
	A7XX_DBGBUS_TESS_BR,
	A7XX_DBGBUS_TESS_BV,
	A7XX_DBGBUS_PC_BR,
	A7XX_DBGBUS_PC_BV,
	A7XX_DBGBUS_VFDP_BR,
	A7XX_DBGBUS_VFDP_BV,
	A7XX_DBGBUS_VPC_BR,
	A7XX_DBGBUS_VPC_BV,
	A7XX_DBGBUS_TSE_BR,
	A7XX_DBGBUS_TSE_BV,
	A7XX_DBGBUS_RAS_BR,
	A7XX_DBGBUS_RAS_BV,
	A7XX_DBGBUS_VSC,
	A7XX_DBGBUS_COM_0,
	A7XX_DBGBUS_LRZ_BR,
	A7XX_DBGBUS_LRZ_BV,
	A7XX_DBGBUS_UFC_0,
	A7XX_DBGBUS_UFC_1,
	A7XX_DBGBUS_GMU_GX,
	A7XX_DBGBUS_DBGC,
	A7XX_DBGBUS_GPC_BR,
	A7XX_DBGBUS_GPC_BV,
	A7XX_DBGBUS_LARC,
	A7XX_DBGBUS_HLSQ_SPTP,
	A7XX_DBGBUS_RB_0,
	A7XX_DBGBUS_RB_1,
	A7XX_DBGBUS_RB_2,
	A7XX_DBGBUS_RB_3,
	A7XX_DBGBUS_UCHE_WRAPPER,
	A7XX_DBGBUS_CCU_0,
	A7XX_DBGBUS_CCU_1,
	A7XX_DBGBUS_CCU_2,
	A7XX_DBGBUS_CCU_3,
	A7XX_DBGBUS_VFD_BR_0,
	A7XX_DBGBUS_VFD_BR_1,
	A7XX_DBGBUS_VFD_BR_2,
	A7XX_DBGBUS_VFD_BR_3,
	A7XX_DBGBUS_VFD_BR_4,
	A7XX_DBGBUS_VFD_BR_5,
	A7XX_DBGBUS_VFD_BR_6,
	A7XX_DBGBUS_VFD_BR_7,
	A7XX_DBGBUS_VFD_BV_0,
	A7XX_DBGBUS_VFD_BV_1,
	A7XX_DBGBUS_VFD_BV_2,
	A7XX_DBGBUS_VFD_BV_3,
	A7XX_DBGBUS_USP_0,
	A7XX_DBGBUS_USP_1,
	A7XX_DBGBUS_USP_2,
	A7XX_DBGBUS_USP_3,
	A7XX_DBGBUS_TP_0,
	A7XX_DBGBUS_TP_1,
	A7XX_DBGBUS_TP_2,
	A7XX_DBGBUS_TP_3,
	A7XX_DBGBUS_TP_4,
	A7XX_DBGBUS_TP_5,
	A7XX_DBGBUS_TP_6,
	A7XX_DBGBUS_TP_7,
	A7XX_DBGBUS_USPTP_0,
	A7XX_DBGBUS_USPTP_1,
	A7XX_DBGBUS_USPTP_2,
	A7XX_DBGBUS_USPTP_3,
	A7XX_DBGBUS_USPTP_4,
	A7XX_DBGBUS_USPTP_5,
	A7XX_DBGBUS_USPTP_6,
	A7XX_DBGBUS_USPTP_7,
};

static const struct gen7_shader_block gen7_0_0_shader_blocks[] = {
	{A7XX_TP0_TMO_DATA,                 0x200, 4, 2, PIPE_BR, A7XX_USPTP},
	{A7XX_TP0_SMO_DATA,                  0x80, 4, 2, PIPE_BR, A7XX_USPTP},
	{A7XX_TP0_MIPMAP_BASE_DATA,         0x3c0, 4, 2, PIPE_BR, A7XX_USPTP},
	{A7XX_SP_INST_DATA,                 0x800, 4, 2, PIPE_BR, A7XX_USPTP},
	{A7XX_SP_INST_DATA_1,               0x800, 4, 2, PIPE_BR, A7XX_USPTP},
	{A7XX_SP_LB_0_DATA,                 0x800, 4, 2, PIPE_BR, A7XX_USPTP},
	{A7XX_SP_LB_1_DATA,                 0x800, 4, 2, PIPE_BR, A7XX_USPTP},
	{A7XX_SP_LB_2_DATA,                 0x800, 4, 2, PIPE_BR, A7XX_USPTP},
	{A7XX_SP_LB_3_DATA,                 0x800, 4, 2, PIPE_BR, A7XX_USPTP},
	{A7XX_SP_LB_4_DATA,                 0x800, 4, 2, PIPE_BR, A7XX_USPTP},
	{A7XX_SP_LB_5_DATA,                 0x800, 4, 2, PIPE_BR, A7XX_USPTP},

Annotation

Implementation Notes