drivers/gpu/drm/msm/adreno/adreno_gpu.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/msm/adreno/adreno_gpu.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/msm/adreno/adreno_gpu.c- Extension
.c- Size
- 33596 bytes
- Lines
- 1260
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/ascii85.hlinux/interconnect.hlinux/firmware/qcom/qcom_scm.hlinux/kernel.hlinux/of_reserved_mem.hlinux/pm_opp.hlinux/slab.hlinux/soc/qcom/mdt_loader.hlinux/nvmem-consumer.hsoc/qcom/ocmem.hadreno_gpu.ha6xx_gpu.hmsm_gem.hmsm_mmu.h
Detected Declarations
function zap_shader_load_mdtfunction adreno_request_fwfunction adreno_zap_shader_loadfunction adreno_create_vmfunction adreno_iommu_create_vmfunction adreno_private_vm_sizefunction adreno_check_and_reenable_stallfunction ktime_afterfunction adreno_fault_handlerfunction adreno_get_paramfunction adreno_set_paramfunction adreno_request_fwfunction request_firmwarefunction adreno_load_fwfunction adreno_hw_initfunction get_rptrfunction adreno_recoverfunction adreno_flushfunction adreno_idlefunction adreno_gpu_state_getfunction adreno_gpu_state_destroyfunction adreno_gpu_state_kref_destroyfunction adreno_gpu_state_putfunction kvfreefunction adreno_showfunction hungfunction adreno_dumpfunction ring_freewordsfunction adreno_wait_ringfunction adreno_get_pwrlevelsfunction adreno_gpu_ocmem_initfunction adreno_gpu_ocmem_cleanupfunction adreno_read_speedbinfunction adreno_gpu_initfunction adreno_has_rgmufunction adreno_gpu_cleanup
Annotated Snippet
if (adreno_gpu->funcs->get_timestamp) {
pm_runtime_get_sync(&gpu->pdev->dev);
*value = adreno_gpu->funcs->get_timestamp(gpu);
pm_runtime_put_autosuspend(&gpu->pdev->dev);
return 0;
}
return -EINVAL;
case MSM_PARAM_PRIORITIES:
*value = gpu->nr_rings * NR_SCHED_PRIORITIES;
return 0;
case MSM_PARAM_PP_PGTABLE:
*value = 0;
return 0;
case MSM_PARAM_FAULTS:
if (vm)
*value = gpu->global_faults + to_msm_vm(vm)->faults;
else
*value = gpu->global_faults;
return 0;
case MSM_PARAM_SUSPENDS:
*value = gpu->suspend_count;
return 0;
case MSM_PARAM_VA_START:
if (vm == gpu->vm)
return UERR(EINVAL, drm, "requires per-process pgtables");
*value = vm->mm_start;
return 0;
case MSM_PARAM_VA_SIZE:
if (vm == gpu->vm)
return UERR(EINVAL, drm, "requires per-process pgtables");
*value = vm->mm_range;
return 0;
case MSM_PARAM_HIGHEST_BANK_BIT:
if (!adreno_gpu->ubwc_config)
return UERR(ENOENT, drm, "no UBWC on this platform");
*value = adreno_gpu->ubwc_config->highest_bank_bit;
return 0;
case MSM_PARAM_RAYTRACING:
*value = adreno_gpu->has_ray_tracing;
return 0;
case MSM_PARAM_UBWC_SWIZZLE:
if (!adreno_gpu->ubwc_config)
return UERR(ENOENT, drm, "no UBWC on this platform");
*value = qcom_ubwc_swizzle(adreno_gpu->ubwc_config);
return 0;
case MSM_PARAM_MACROTILE_MODE:
if (!adreno_gpu->ubwc_config)
return UERR(ENOENT, drm, "no UBWC on this platform");
*value = qcom_ubwc_macrotile_mode(adreno_gpu->ubwc_config);
return 0;
case MSM_PARAM_UCHE_TRAP_BASE:
*value = adreno_gpu->uche_trap_base;
return 0;
case MSM_PARAM_HAS_PRR:
*value = adreno_smmu_has_prr(gpu);
return 0;
case MSM_PARAM_AQE:
*value = !!(adreno_gpu->funcs->aqe_is_enabled &&
adreno_gpu->funcs->aqe_is_enabled(adreno_gpu));
return 0;
default:
return UERR(EINVAL, drm, "%s: invalid param: %u", gpu->name, param);
}
}
int adreno_set_param(struct msm_gpu *gpu, struct msm_context *ctx,
uint32_t param, uint64_t value, uint32_t len)
{
struct drm_device *drm = gpu->dev;
switch (param) {
case MSM_PARAM_COMM:
case MSM_PARAM_CMDLINE:
/* kstrdup_quotable_cmdline() limits to PAGE_SIZE, so
* that should be a reasonable upper bound
*/
if (len > PAGE_SIZE)
return UERR(EINVAL, drm, "invalid len");
break;
default:
if (len != 0)
return UERR(EINVAL, drm, "invalid len");
}
switch (param) {
case MSM_PARAM_COMM:
case MSM_PARAM_CMDLINE: {
char *str, **paramp;
Annotation
- Immediate include surface: `linux/ascii85.h`, `linux/interconnect.h`, `linux/firmware/qcom/qcom_scm.h`, `linux/kernel.h`, `linux/of_reserved_mem.h`, `linux/pm_opp.h`, `linux/slab.h`, `linux/soc/qcom/mdt_loader.h`.
- Detected declarations: `function zap_shader_load_mdt`, `function adreno_request_fw`, `function adreno_zap_shader_load`, `function adreno_create_vm`, `function adreno_iommu_create_vm`, `function adreno_private_vm_size`, `function adreno_check_and_reenable_stall`, `function ktime_after`, `function adreno_fault_handler`, `function adreno_get_param`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.